LABORATORY EXPERIMENT 6 Analog to Digital Conversion Purpose: The objective of this experiment is to design example analog to digital converters

(ADC or A/D Converter) using: 1) a two-bit flash (parallel) converter; 2) a four-bit counter (servo) type converter, and 3) a monolithic ADC chip (ADC0804). After designing the circuit configurations determine which gives better performance, speed, cost effectiveness, etc. Pre-laboratory Design: The pre-laboratory design consists of a preliminary design with values calculated using equations found in the ADC Design Notes and the literature. Simulations (MultiSim) for each of the three configurations are required prior to prototyping the circuits. Part 1: Flash A/D Converter The first part of this experiment deals with using a flash (parallel) analog to digital converter to illuminate two LEDs in a manner that corresponds to the value of the analog input. Figure 1 shows the elements of the flash A/D converter.

Figure 1: Two-Bit Flash A/D Converter Configuration.

Implement the comparators with the LM339 Comparators, not a LM741, because the LM741 does not have a rail-to-rail output. The LM339 also has an open-collector output with means it cannot source current directly and therefore requires a pull-up resistor ( like 1 to 10k resistors connected from the LM339 output to the supply rail). The code converter will consist of logic gates that convert the inputs A, B, and C to true binary outputs X and Y. Create a logic table for the code converter and then implement with NAND logic gates. Note that NOT gates can be created by tying the

BIEN-4390 Spring Semester

input pins of the NAND gate together and having a single input applied to them. Try to use as little real estate (chips, resistors, space, etc.) as possible.

Laboratory Measurements/Calculations: 1. 2. 3. 4. 5. 6. Calibration Curve: Digital Outputs vs. Analog Inputs. Find the Conversion Gain Linearity: Find linear regression line for calibration curve. Resolution: Bit resolution (mV). Zero Offset: The digital output when analog input is set to zero. Step Size: Analog input voltage required to change the digital output one bit.

Part 2: Counter (servo) Type Converter The next part of this experiment incorporates a four-bit UP/DOWN counter in a analog to digital converter. Figure 2 shows the configuration for this converter.

Figure 2: Counter (servo) Type Converter Configuration.

When implementing this circuit, R should be at least 10k to limit the current sourced from the CD4050 Buffer device. Also LEDs can be connected to the four bit digital outputs from the five volt power supplies (+Vs) through current limiting resistors (limit current to around 4mA). Note also that the LM339 supply voltage should be higher than the supply voltages of the other chips (greater than 5V) because it does not work with rail-to-rail inputs. The input voltage, Vin, can be supplied from a function generator that

BIEN-4390 Spring Semester

can provide precisely settable DC voltages. Use another function generator to supply the clock input for the 74L191. Make sure to offset the signal appropriately. Eliminate ground loops.

Laboratory Measurements/Calculations: 1. 2. 3. 4. 5. 6. Calibration Curve: Digital Outputs vs. Analog Inputs. Find the Conversion Gain Linearity: Find linear regression line for calibration curve. Resolution: Bit resolution (mV). Zero Offset: The digital output when analog input is set to zero. Step Size: Analog input voltage required to change the digital output one bit.

Part 3: Monolithic A/D Converter Chip The final part of this experiment is to use a commercially available monolithic A/D converter chip to produce 8-bit analog to digital conversion. Refer to the ADC0804 specification sheet for performance parameters and design details. Connect the A/D chip to LED indicators that will represent the most significant outputs bits.
R9
10k

VCC
5V

C1
150pF
1 CS/

U1
Vcc 20

RD/

CLKR

19

DGND

DGND
3 WR/ DB0 18

R1
1.2k

LED1 R2
1.2k

CLK

DB1

17

LED2 LED3 LED4 LED5 LED6 LED7 LED8

StartConversion

INTR/

DB2

16

R3
1.2k

Analog Input
Vin C2
0.1F

Vin+

DB3

15

R4
1.2k

Vin-

DB4

14

R5
1.2k

AGND

DB5

13

R6
1.2k

Vref / 2
2.5V

Vref/2

DB6

12

R7
1.2k

10

C3
0.1F

DGND

DB7

11

R8
1.2k

ADC0804

C4
10F

DGND

BIEN4390 - Biomedical Instrumentation Design Laboratory Monolithic Successive Approximation A/D Converter

DGND

Figure 3: Monolithic Successful Approximation A/D Configuration

BIEN-4390 Spring Semester

Laboratory Measurements/Calculations: 1. 2. 3. 4. 5. 6. Calibration Curve: Digital Outputs vs. Analog Inputs (for 3 MSB). Find the Conversion Gain Linearity: Find linear regression line for calibration curve. Resolution: Bit resolution (mV). Zero Offset: The digital output when analog input is set to zero. Step Size: Analog input voltage required to change the digital output one bit.

BIEN-4390 Spring Semester