You are on page 1of 7

ZHANG Hualiang, December 22, 2004

ADS Application Notes


Wireless Communication Laboratory Department of Electrical and Electronic Engineering Hong Kong University of Science and Technology

The Design of Low Noise Amplifier Using ADS

ZHANG Hualiang, December 22, 2004

Introduction
This application note describes the design procedure of low noise amplifier(LNA) working from 3GHz to 4GHz using agilents ADS. In the following part of this note, I will show the design procedures step by step.

Design procedures
1. DC-biasing In this design, a NE76184AS GaAs FET transistor is used. You can choose the model for this transistor from the library(Details can be found in our application notes for the oscillator design). After selecting the transistor, suitable DC biasing is required for the transistor to operate properly. The category for DC simulation is given below.

Icon for DC simulation

Button for DC simulation setting

Symbol for current probing Category for probe components

ZHANG Hualiang, December 22, 2004

Finally we find the bias voltage is Vg=-0.818V.

2. Stability of the transistor We will not mention the theory of the stability. We only show the setting for the stability simulation. The button for stability simulation are included in the S-parameters as shown below:

Different buttons for different kinds of stability simulation

ZHANG Hualiang, December 22, 2004

After choosing the icons we need, the final simulation result for stability simulation of the transistor is given below:

L_StabCircle1 S(1,1)

freq (3.000GHz to 4.000GHz) indep(L_StabCircle1) (0.000 to 51.000)

It can be seen from the figure, the transistor is stable at most of the frequency band in the simulation. But at the frequency f>3.75GHz, it is not stable. 3. Biasing Network Design To provide gate and drain bias of transistor, biasing network should be designed. We use stubs to do the biasing network. The category for stubs is shown below:

Category for biasing network design

ZHANG Hualiang, December 22, 2004

The schematic of the circuit for bias network is shown below:


S-PARAMETERS
S_Param SP1 Start=3 GHz Stop=4 GHz Step=250 MHz
Var Eqn

VAR VAR1 X=234.6

MSub
MSUB MSub1 H=62.0 mil Er=4.5 Mur=1 Cond=5.8E+7 Hu=3.9e+034 mil T=1.38 mil TanD=0.017 Rough=0 mil

Term Term1 Num=1 Z=50 Ohm

MLIN TL1 Subst="MSub1" W =25.0 mil L=482.0 mil

MSTEP Step1 Subst="MSub1" W 1=25.0 mil W 2=608.0 mil

MLEF TL2 Subst="MSub1" W =608 mil L=X mil

4. Input-matching and output-matching network We choose open-stub to do the input and output matching. In ADS we can use the optimization function to do this.

Category for optimization of the parameters in the circuit

Setting the optimization goal

ZHANG Hualiang, December 22, 2004

The schematic in ADS for input and output matching simulation are given below:
OPT IM
Optim Optim1 OptimType=Random ErrorForm=L2 M axIters=200 P=2 DesiredError=0.0 StatusLevel=4 FinalAnalysis="None" NormalizeGoals=no SetBestValues=yes Seed= SaveSolns=no SaveGoals=yes SaveOptimVars=no UpdateDataset=yes SaveNominal=yes

GOAL
Goal OptimGoal1 Expr="dB(S(2,1))" SimInstanceName="SP1" M in=11 M ax= Weig ht= Rang eVar[1]="freq " Rang eM in[1]=3GHz Rang eM ax[1]=4GHz M LOC TL8 Subst="M Sub1" W=115.0 mil L=704.661 mil

GOAL
Goal OptimGoal2 Expr="NFmin" SimInstanceName="SP1" M in= M ax=1.6 Weig ht= Rang eVar[1]="freq " Rang eMin[1]=3GHz Rang eMax[1]=4GHz

MSub
M SUB M Sub1 H=62.0 mil Er=4.5 M ur=1 Cond=5.8E+7 Hu=3.9e+034 mil T= 1.38 mil TanD=0.017 Roug h=0 mil

S-PARAM ET ERS
S_Param SP1 Start=3 GHz Stop=4 GHz Step=250 MHz

SaveAllIterations=no UseAllOptVars=yes UseAllGoals=yes

M LOC TL9 Subst="M Sub1" W=115.0 mil L=651.961 mil

Term Term1 Num=1 Z=50 Ohm

M TEE Tee2 Subst="M Sub1" W1=115 mil W2=115 mil W3=25 mil

M LIN TL6 Subst="M Sub1" W=115.0 mil L=219.478 mil

L L3 L=0.2 nH R=

L L1 L=0.2 nH R= pf_nec_NE76184A_19921216 A1

M LIN TL3 Subst="M Sub1" W=115.0 mil L=272.974 mil

MTEE Tee1 Subst="MSub1" W1=115 mil W2=115 mil W3=25 mil

Term Term2 Num=2 Z=50 Ohm

L L5 L=0.25 nH R=

5. The whole circuit plus biasing circuits and DC block capacitance.


MSub
NsCircle

S-PARAMETERS
S_Param SP1 Start=3 GHz Stop=4 GHz Step=250 MH z MLEF TL2 Subs t="MSub1" W=608 mil L=234.6 mil

NsC irc le NsC irc le1 NsC irc le1=ns_circle({0.5}+N Fmin,N Fmin,Sopt,R n/50,51)

MLEF TL11 Subs t="MSub1" W=608.0 mil L=234.6 mil

MSUB MSub1 H =62.0 mil Er=4.5 Mur=1 C ond=5.8E+7 H u=3.9e+034 mil T=1.38 mil TanD=0.017 R ough=0 mil

Biasing stubs for the signal

GaCircle

GaC irc le GaC irc le1 GaC irc le1=ga_circle(S,max_gain(S)-{0,1,2},51)

MSTEP Step2 Subst="MSub1" W1=25.0 mil W2=608.0 mil

MSTEP Step1 Subst="MSub1" W1=25.0 mil W2=608.0 mil

SStabCirc le

S_StabCirc le S_StabCirc le1 S_StabCirc le1=s_stab_c irc le(S,51)

C C4 C=27 pF

V_DC SRC 2 Vdc=-0.82 V

R R1 R=510 Ohm

C C3 C=27 pF

V_DC SRC1 Vdc=8.1 V

LStabCirc le

L_StabCirc le L_StabCirc le1 L_StabCirc le1=l_s tab_circle(S,51)

MLIN TL10 Subs t="MSub1" W=25.0 mil L=482.0 mil

MLIN TL1 Subs t="MSub1" W=25.0 mil L=482.0 mil

Term Term1 Num=1 Z=50 Ohm

L L4 L=1.0 nH R=

C C6 C=1 pF

MLIN TL12 Subst="MSub1" W=115.0 mil L=200.0 mil

C C5 C=3 pF

MTEE MLIN Tee2 TL6 Subs t="MSub1" Subst="MSub1" W1=115 mil W=115.0 mil L=219.478 mil W2=115 mil W3=25 mil MLOC TL9 Subst="MSub1" W=115.0 mil L=651.961 mil

L L3 L=0.2 nH R=

L MLIN L1 TL3 L=0.2 nH Subst="MSub1" R= pf_nec_N E76184A_19921216 W=115.0 mil L=272.974 mil A1

MTEE Tee1 Subs t="MSub1" W1=115 mil W2=115 mil W3=25 mil

C C1 C =3 pF

MLIN TL5 Subs t="MSub1" W=115.0 mil L=200.0 mil

C C2 C=1.0 pF

L L2 L=1.0 nH R=

Term Term2 Num=2 Z=50 Ohm

L L5 L=0.25 nH R=

Impedance matching network

MLOC TL8 Subs t="MSub1" W=115.0 mil L=704.661 mil

ZHANG Hualiang, December 22, 2004

6. Results The details about how to display the results can be found in our application notes for oscillator. Here we only give the final simulation results in ADS.
1.45 1.40 1.35

13.0

12.5

d B (S ( 2 ,1 ) )

n f(2 )

12.0

1.30 1.25 1.20 3.0 3.2 3.4 3.6 3.8 4.0

11.5

11.0 3.0 3.2 3.4 3.6 3.8 4.0

freq, GHz

freq, GHz

The noise figure of the LNA is about 1.35dB and gain of the amplifier is about 12dB. This is what we want for the power amplifier design.

Conclusion
In this note we show how to design a low noise amplifier using ADS. All the necessary steps including the matching network, bias point selection, stability simulation are given in this note. The ADS even provides the function to choose the parameters automatically for the user, provided that we give the optimization target. In a word, agilents ADS is powerful for the circuit design at RF frequency.

You might also like