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Spring 2012
Bilkent University
Department of Electrical and Electronics Engineering EEE 313 Electronic Circuit Design
Understanding the circuit configuration and its components: The npn transistor is connected in a common emitter configuration. The input and output voltage signals are coupled to and from the amplifier with the use of coupling capacitors C1 and C2. The biasing network consisting of resistors R1 and R2 biases the transistor to a DC Q-point. The emitter resistor RE = RE1+RE2 provides bias stability against variations in . The output of the amplifier is connected to a load that has a resistance of RL. The total emitter resistance RE is provided by two separate resistors in series. The second emitter resistor RE2 is bypassed with a capacitor CE in order to increase the voltage gain. However, the small emitter resistance (RE1) is left in the AC circuit, the purpose of which is explained in the next page.
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Spring 2012
The small-signal AC equivalent circuit for this amplifier is shown in the figure.
It is assumed that
circuit without adding any extra component like ro) and all capacitors can be considered to be short circuit
at the frequency of operation. The value of the small-signal input resistance is determined by the DC base current . The transistor small-signal transconductance is given by
(you are suggested to use ib instead of gmv)
It is important to note that the presence of the bypass capacitor CE and the output coupling capacitor C2 result in a difference between the slopes of the AC and DC load lines. You are suggested to leave some margin of safety when considering the maximum peak-to-peak undistorted (unclipped) output voltage swing while setting the Q-point. The emitter resistor RE1 serves three functions:
(in the quiz, you may be asked about these functions)
1. Adjust the voltage gain to a desired value: When RE1 = 0, the voltage gain of the amplifier is as high as it can be for the circuit at hand. Setting RE1 to a nonzero value provides a mechanism to decrease the gain to a desired value. 2. Provide stability against variations in due to variations in the emission coefficient n: The emission coefficient of a transistor may show a variation from transistor to transistor much like the transistor . This variation influences the value of which in turn affects the voltage gain and the input resistance of the amplifier. If RE1 is relatively large so that , the voltage gain and the input resistance are not influenced by changes in the value of n. 3. Provide linear (undistorted) operation for larger input signals: When RE1 = 0, the input voltage is limited to values that are much smaller than VT for linear (undistorted) operation. This is so because the small-signal approximation fails unless . However, if RE1 is relatively large so that he base current is mainly determined by the linear resistance ( +1)RE1, rather than the nonlinear i-v curve approximated by the resistance r.
Spring 2012
The DC supply voltage, the load resistance, and the coupling and bypass capacitor capacitances are given as:
Silver Requirement 24dB<Av<26dB Min. 5k Min. 7V_ Max. 4%_ Max. 1dB
Gold Requirement 24.5dB<Av<25.5dB Min. 5k Min. 8V_ Max. 3%_ Max. 1dB
Spring 2012
Explanations of the terms are as follows: Bronze Requirement: This is the minimum requirement for you to be able to pass the first(April 30) session of the Experiment. Doing this will be evaluated as poor design. Silver Requirement: This is the normal requirement you should do. Doing this will be graded as usual. Gold Requirement: This is the advanced requirement which is optional. Doing this will be awarded with extra grades.
To satisfy a requirement(Bronze/Silver/Gold), your design should satisfy all of the related 5 parameters(Av,rin,Vpp,ICQ variation, Av variation For example, if ICQ variation is 3.5%, you can not satisfy Gold Requirement even if the other parameters (Av,rin,Vpp,Av variation) are quite good.
Av: This is the gain value in dB Scale (20log (vout/vin) ) Amplifier gains are generally expressed in dB. The gain value of your design should be in this range for all of the nine and n combinations. rin: This is the AC input resistance of the amplifier. It should be higher than 5k so that the amplifier takes higher portion of the input signal from the source (considering the presence of signal generators resistance) The rin value of your design should satisfy the given requirement for all of the nine and n combinations. Swing Vpp : This is used to refer Peak-to-peak Undistorted Output Voltage Swing. Output voltage swing is quite important in an amplifier. It is meaningless to have an amplifier of thousands of voltage gain value if you have a low output voltage swing. Note that the swing does not depend on n value. Thus, you can check this requirement only for three different values. ICQ variation with : We require ICQ does not vary much with the varying values. Note that the ICQ does not depend on n value. Thus, you can check this requirement only for three different values. This requirement is calculated by the equation (ICQ when =460 - ICQ when =200 ) / ICQ when =330 Av variation with and n: We require Av does not vary much with the varying and n values. This requirement means that among the nine different gain values related to your design
maximum gain value(dB) - minimum gain value(dB) < 1dB
No rout requirement is given since RL is known. 1. Design your amplifier determining the values of R1, R2, RC, RE1, and RE2. Show all your work clearly. Write down the values of these resistors after finishing your design: R1 R2 RC RE1 RE2
Use only standard values: 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68, 82 ( ) There are many R1, R2, RC, RE1, and RE2 combinations satisfying these requirements thus, we expect that your R1, R2, RC, RE1, and RE2 values to be unique.
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2. Fill the table below. Show your calculations only for = 330, n=1.4 case. = 200, n=1 Av (dB) rin Swing Vpp ICQ r VCEQ = 330, n=1 Av (dB) rin Swing Vpp ICQ r VCEQ = 460, n=1 Av (dB) rin Swing Vpp ICQ r VCEQ = 200, n=1.4 Av (dB) rin Swing Vpp ICQ r VCEQ = 330, n=1.4 Av (dB) rin Swing Vpp ICQ r VCEQ = 460, n=1.4 Av (dB) rin Swing Vpp ICQ r VCEQ = 200, n=2 Av (dB) rin Swing Vpp ICQ r VCEQ = 330, n=2 Av (dB) rin Swing Vpp ICQ r VCEQ = 460, n=2 Av (dB) rin Swing Vpp ICQ r VCEQ
3. According to table in Part 2, fill the tables below. ICQ when =460 ICQ when =200 ICQ when =330 ICQ variation with
Maximum Av (dB) Minimum Av (dB)
4. Simulate your amplifier desing using LTSPICE. First, do bias point analysis to determine DC voltages and currents. Next, do a time domain analysis using an input sine wave of 200 mV peak-topeak at a frequency of 1 kHz, and determine the voltage gain. Increase the input voltage amplitude until any distortion or clipping starts at the output. Determine the peak-to-peak undistorted output voltage swing. Print the necessary screenshots including circuit schematics, bias point analysis results, input signal vs. time, output signal vs. time graphs. Clearly explain your results and comment on them. (Note that the model in the Moodle has Forward=280)
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During your design: Clearly explain your formulations, assumptions and final results. During your calculations, if you get Rx//Ry, leave it as it is. Do not write RxRy/(Rx+Ry), which makes the equation more complex. After defining certain limits for the resistor values R1, R2, RC, RE1, and RE2 and finding initial R1, R2, RC, RE1, and RE2 values. You are suggested to write a code (i.e. in MATLAB) to calculate the requirements according to your R1, R2, RC, RE1, and RE2 values. Use this code to improve your code by changing your initially designed R1, R2, RC, RE1, and RE2 values. While setting the VCEQ value which will effect the swing value, realize that negative swing is VCEQ-VCESAT; however, positive swing is not 15- VCEQ. (Smaller than 15VCEQ ) due to difference in the slopes of the AC and DC load lines. Thus, it is suggested to place the VCEQ value closer to 0.2V (VCESAT)than 15V. This means setting VCEQ smaller than 7.6V. ( (15V+0.2V)/2 ) Suggestions 1. Start by obtaining clear formulations of Av, rin, IBQ, ICQ and r. Use Thevenin equivalent of VCC, R1 and R2 in DC calculations. Do not make any assumptions yet. Do not place and n values. 2. Using Av formulation, obtain a condition for gain stability (gain should not depend much on and n) A condition relating r with RE1(+1) 3. Using rin formulation, obtain conditions for satisfying rin requirement. About R1//R2 and (r + RE1(+1) ) Note that if A//B >> C, this implies A>>C and B>>C. 4. Using ICQ formulation, obtain a condition for ICQ stability (ICQ should not depend much on ) About R1//R2 and (+1) (RE1+ RE2) 5. Roughly assign the values for R1, R2, RC, RE1, and RE2. For example, assign the orders of the parameters, like R1 is in the order of 100 (this means that R1 can be 100,120,150,820 ) 6. Write a Matlab code (or Excel code) that calculates the requirements (Av,rin) when R1, R2, RC, RE1, and RE2 are entered. 7. Enter the rough values you found in Step 5 to your code; get the results and try to improve by changing the R1, R2, RC, RE1, and RE2 values. Refer to your formulations in deciding which resistor value to change. For example, if the gain is lower than expected, you can increase Rc or decrease RE1 or You can explain this part of your design procedure by giving the parameters you tried, explaining how you changed them to get the final design parameters.
Spring 2012
About Matlab: Even if you do know nothing about Matlab, you can learn the basics quickly from the web. You do not have to use advance features of Matlab in this experiment. The following code calculates the possible resistor ratios in case you need. You can obtain 10n multiples of these ratios. These ratios might be useful especially in choosing R1 and R2 values to set ICQ and Av values.
Available_Resistors=[10 12 15 18 22 27 33 39 47 56 68 82]; for m=1:length(Available_Resistors) for n=1:length(Available_Resistors) Available_Ratios(m,n)=Available_Resistors(m)/Available_Resistors(n); end end
The algorithm for your code can be as follows: i. Clear the predefined parameters, etc.
clc; clear all;
iv. Calculate IBQ, ICQ, IEQ . (each will be 1x3 sized matrices) Since you are multiplying the matrices, you should put .(dot) before each operator to avoid standard matrix multiplication. Otherwise, you may observe errors like matrix dimensions are not suitable. o Ex. IcQ =beta.*IbQ
(beta and IBQ have both dimensions of 1x3)
Spring 2012
R1
Standard Measured Value Value
R2
RC
RE1
RE2
RL
Construct the amplifier circuit using the values indicated in the preliminary work section. 1. Determine the Q-point: Without connecting the signal generator, Measure ICQ and VCEQ, fill the table below with your measurements and calculated values. and compare measured values with your calculations. Calculate the maximum peak-to-peak undistorted (unclipped) output voltage swing that you can expect for this Q-point. Measured =200 ICQ VCEQ Comparison: Calculated (from preliminary work) =330 =460
Spring 2012
2. Measure the voltage gain of your amplifier: Connect the signal generator. Set the input voltage signal to a sinusoid with 5 kHz frequency and 100 mV peak-to-peak amplitude. Observe the input and output voltage waveforms on the oscilloscope. Fill the tables below: Measure the voltage gain of the amplifier and compare with your calculations. Also note down these values in the given boxes below. Comment on your observations. Vpp(in) Vpp(out) measured Av (linear scale) Av,dB (dB scale)
Comments:
Maximum
What time is it? 3. Determine the maximum peak-to-peak undistorted (no distortion and clipping) output voltage swing: Set the signal generator to triangular wave output; this will make it easier to observe clipping/distortion. Fill the tables below. Compare your results with those found in the preliminary work and comment on them.
measured Max. undistorted output voltage swing (p-p) Comments: calculated Minimum 3=330 Maximum
Spring 2012
Note that distortion is occurs at the lower part of the output signal) since the transistor goes into SAT region and clipping occurs at the upper part of the output signal since the transistor goes into OFF region. Gradually increase the input signal amplitude and observe both of the distortion and clipping. Plot the input vs. time, output vs. time and XY mode plots. Does clipping start earlier or distortion? Comment on the location of the Q-point of your design on the AC load line. Is it close to left limit (VCESAT) or right limit? On the IC-VCE graph, fill the boxes to express their relation with the related part of the input signal period.
XY mode
Comments:
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4. Observe the linearity of your amplifier: You may refer to XY mode signal obtained in step 3 for convenience, as well. Set the signal generator back to a sinusoidal wave output. Set the input signal amplitude to a value such that the output peak-to-peak voltage swing is 7V. (Set to 3V if your design is according to the bronze requirement) Compare the input and output waveforms on the oscilloscope to get a qualitative feel for the linearity of your amplifier. Write down input signal amplitude and voltage gain in the boxes below. Then comment on your observations. input signal amplitude Av,dB
5. Measure the input resistance of your amplifier: To do this, connect a 10 k resistor between the signal generator and the input of your amplifier as shown below. (only input side of the amplifier is shown) In this measurement, set the input voltage signal to a sinusoid with 100 mV peak-to-peak amplitude.
You can make a voltage division between Rin and the 10 k resistor, as shown in the figure below. In this figure, Ri is the input resistance.
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By measuring vin and vd by oscilloscope, you can calculate the value of Rin. Compare this value with your calculations. Use the space provided below for calculation of Rin. Write down the input resistance calculated from your measurements and the already calculated ones. Comment on your observations. Rin calculation:
Calculated Maximum
Comments:
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Spring 2012
What time is it? Please write your feedback (in Turkish or English) below. Feedback about the Experiment 7:
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