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Low-Noise Amplifier Design Around 1.

9GHz

Group 2
Zicong Mei Weixin Zhao Yan Li

Low-Noise Amplifier Design Around 1.9GHz


Zicong Mei, Weixin Zhao, Yan Li Syracuse University Electrical Engineering and Computer Science Department Syracuse, NY 13210, USA

1. Introduction
Low-noise amplifier (LNA) is an electronic amplifier used to amplify very weak signals (for example, captured by an antenna). It is usually located very close to the detection device to reduce losses in the feed line. For the design process, LNA design typically begins by assessing functional requirements for the application. Candidate devices are then selected based on specifications including NF, stability, gain, and VSWR for input and output port. The actual design work starts with S-parameters and choice of an appropriate transistor for the device, followed by synthesis of matching networks. The design is optimized to assure requirements can be met using available vendor parts. Layout includes choosing appropriate parts, adding interconnections and pads. The performance is then measured. Finally, the overall design is reviewed.

2. Functional requirements
As shown in this report, the low noise amplifier is intended for a handheld phone application, and will require a general low-noise receiver front-end to cover the 1.8GHz mobile phone bands. The functional requirements are listed below. Frequency range: 1.6-2.0GHz Noise Figure: < 1dB Gain: > 10dB VSWR in: < 2.0:1 VSWR out: < 2.0:1 Supply voltage: 3V

The sub 1dB NF is important in this application, taking on even greater importance than voltage standing wave ratio (VSWR). However, a VSWR of 2.0:1 or better is still highly desirable for both input and output matching networks (IMN and OMN). Since the design is intended for a portable device, low voltage operation using a 3-volt battery is required. Cost is also a key constraint, while space is slightly less criteria [2].

3. The design process


Microwave transistor amplifier design is basically designing two impedance matching networks. And they are chosen based on the functional requirements like gain, VSWR, NF, stability, which are mentioned above. A design usually starts with a set of specifications and the selection of the proper transistor. Then a systematic mathematical solution, aided by graphical methods, is developed to determine the transistor loading (i.e., the source and load reflection coefficients) for a particular stability and gain criteria. An unconditionally stable transistor will not oscillate with any passive termination [1]. And this is ideal for the design. 3.1 Selection of the transistor Based on the specifications, we decided to choose the ATF-54143 series transistors because of the high gain, low noise, and bias condition. The device features 0.5dB NF, and 17.7dB gain at 1.9GHz, 3V, 60mA. The transistor is ideal for cellular/PCS base stations, MMDS, and other systems in the 450 MHz to 6 GHz frequency range. The S-parameters and noise parameters for this device are shown.

ATF-54143 Typical Scattering Parameters, VDS = 3V, IDS = 60 mA


Fre q GH z S11 Mag . Ang. dB S21 Mag. Ang . S12 Mag . An g. S22 Mag . Ang.

0.1 0.5 0.9 1 1.5

0.989

0.54 -14 1 0.809 -80.8 26.04 20.047 128 0.033 52.4 0.395 -58.8 0.706 -117.9 22.93 14.00 106.2 0.04 41. 0.291 -83.8 6 3 8 0.687 -124.4 22.24 12.94 102.2 0.04 40. 0.272 -88.5 5 4 0.64 -149.8 19.4 9.335 86.1 0.053 36.1 0.207 -105.2

-18.9

28.84 27.664 167.6 0.009

80

1.6 1.7 1.8 1.9 2 2.5 3 4 5

0 0.633 -154.1 18.93 0.629 -157.8 18.4 9 0.623 -161.4 18.07 0.621 -164.9 17.67 0.615 -168.3 17.28 0.602 176.2 15.58 0.601 162.3 14.1 5 0.621 0.656 137.1 115.5 11.81 9.87

8.841 8.401 8.005 7.643 7.308 6.01 5.098 3.896 3.114

83.4 80.7 78.2 75.6 73.3 61.8 51 30.8 11.7

0.055 35.5 0.198 -107.5 0.057 35 0.189 -110.3 0.058 34. 4 0.06 33.8 0.062 33.3 0.07 30.1 0.078 26.5 0.18 -112.4

0.173 -114.7 0.165 -117 0.131 -129.7 0.106 -146.5 165.2 131.5

0.09 17.1 0.099 4 0.107 6.8 0.142

Typical Noise Parameters, VDS = 3V, IDS = 60 mA


Fre q GH z Fmin dB Ma g. opt Ang. Rn/5
0

dB

0.8 0.9 1 1.9 2 2.4 3 3.9 5 5.8 6 7 8 9 10

0.18 0.2 0.22 0.42 0.4 5 0.52 0.59 0.7 0.93 1.16 1.19 1.26 1.63 1.69 1.73

0.33 0.32 0.32 0.27 0.27 0.26 0.29 0.36 0.47 0.52 0.55 0.6 0.62 0.7 0.79

0.0 4 62.8 0.03 67.6 0.0 4 116.3 0.0 4 120.1 0.0 4 145.8 0.0 4 178 0.03 -145.4 0.05 -116 0.1 -98.9 0.18 -96.5 0.2 -77.1 0.37 -56.1 0.62 -38.5 0.95 -21.5 1.4 5

54

3.2 Input and output matching network

The design of the matching networks can be start from the input matching network by selecting a S (shown as in Figure 1), at the smith chart with the desired gain and noise figure, and matching to that S pointed from the origin of the smith chart. With the IMN, we then design the outmatching network. As OUT will be available by knowing S, we then choose L equal to conjugate of OUT. Then we match to the conjugate point on the smith chart and have the OMN. By designing in this way (i.e. taking L to be conjugate of OUT), the VSWR for the output port will be 1 ideally, but the input port will get degradation. So we need to modify the S, and modify other parameters separately. An easy way to do this is using the optimizer of the simulation software. By setting the value of the IMN and OMN parts to be symbols, we can optimize those symbol values with goal set up.

Figure 1 Microwave transistor amplifier block diagram The initial design of IMN and OMN is as below in Figure 2. We use the microstrip line to form the matching networks. All the series microstrip lines are 50 lines at center frequency of 1.8GHz.

Figure 2 The input and output matching networks

However, the simulation results show that there is oscillation at low frequency of 100MHz. As we know, a potentially unstable transistor can be made unconditionally stable by either resistively loading the transistor or by adding negative feedback. These techniques are not recommended in narrowband amplifiers because of the resulting degradation in gain, noise figure, and so on [1]. However, our design has a BW over 20%, so it cannot be taken as a narrowband design. So we decide to load the transistor with resistors. We add a shunt resistor between the transistor and IMN, shown in Figure 3, and this combination can be analyzed as a transistor unit.

Figure 3 The new transistor unit after adding the resistor The stability circles before and after adding the resistor are shown in Figure 4. The red circle is the input stability circle at 0.1 GHz, which is the oscillation frequency in the original design. As a comparison, the right figure shows that the stability circle at 0.1 GHz is pushed away from the smith chart after adding the resistor. So the new transistor unit becomes unconditionally stable at 0.1 GHz. Figure 5 shows the INM and OMN for the new transistor unit.

Figure 4. Stability circles: original transistor (left); after adding the resistor (right)

Figure 5 The input and output matching networks for the new transistor unit

3.3 DC bias network For the dc bias network, we use the recommended one in the transistor datasheet [3]. So the final design with dc bias network is as below in Figure 6. The two high impedance lines with impedance of 200 ohms are used to isolate RF component and dc component. The electrical length for them is 90 degrees at the center frequency.

Figure 6 Final design with dc bias network

4. Simulation results
We use the commercial software Ansoft Designer 4.0 to simulate our design. The substrate we choose is Roger 5880/60mil. Figure 7, 8 and 9 show the VSWR, noise figure and gain separately. Within the frequency range of 1.6GHz to 2.0GHz, the gain is around 16dB; VSWR is below 1.7 for both input and output ports, and noise figure is around 0.6 to 0.7 dB. All the specifications are met.

Ansoft LLC X Name


2.00 m1
m2 m3

XY Plot 6
Curve Info

Nexxim1
VSWR(Port1) LinearFrequency VSWR(Port2) LinearFrequency

1.6000 1.6712 1.8000 1.1270 2.0000 1.6066

1.80
m1

1.60 Y1

m3

1.40

1.20
m2

1.00

1.50

1.60

1.70

F [GHz]

1.80

1.90

2.00

Figure 7 (a) Simulated VSWR for input and output ports


XY Plot 7
Name m1 m2 m3 X Y 1.6000 0.6260 1.8000 0.6595 2.0000 0.7367 Curve Info dB(NF) LinearFrequency

Ansoft LLC
0.74

Nexxim1
m3

0.72

0.70

dB(NF)

0.68
m2

0.66

0.64
m1

0.62

0.60

1.50

1.60

1.70

F [GHz]

1.80

1.90

2.00

Figure 7 (b) Simulated Noise Figure

Ansoft LLC
17.25
Nam e

XY Plot 8
X 1.6000 1.8000 2.0000 Y 16.4291 15.8859 15.1550 m 1 m 2 m 3

Nexxim1
Curve Info dB(GA) LinearFrequency dB(GP) LinearFrequency

17.00

16.50

m1

Y1 16.00

m2

15.50
m3

15.00

1.50

1.60

1.70

F [GHz]

1.80

1.90

2.00

Figure 7 (c) Simulated GA and GP

5. Fabrication and Layout


The working circuit is now our goal after achieving the simulation results which can not replace actual measurement of the circuit. Below Figure 8 shows the layout generated in AutoCAD. The prototype in Figure 9 is built based on the layout in Figure 8.

Figure 8 Layout generated from AutoCAD

Figure 9 The prototype amplifier

6. Measurement results
The network analyzer is used to measure the performance of the prototype amplifier. Figure 10 and Figure 11 show the actual screen capture of the S parameters and noise figure shown on the analyzer. Unfortunately, the measured performance is worse than the simulation results. The amplifier gain around 10dB in the frequency range from 1.6 GHz to 2GHz is 5dB less than the simulation results. Figure 11 shows the noise figure between 1.3 GHz and 2.3 GHz. The noise figure has a peak at 1.9GHz which is the frequency of the cell phone and this is as we may expect. The noise figure measurement data is 1dB worse than the simulation result. Figure 12 shows the gain in different input power. When the input power is around -50dBm, the input signal level is comparable with the noise level, and this leads to the vibration at the figure. The amplifier gain starts to degrade when the input power exceeds 0dBm.

Figure 10 Measured S parameter

3 .5

3 N ise fig re (d ) o u B

2 .5

1 .5

1 1 .3

1 .4

1 .5

1 .6

1 .7 1 .8 1 .9 Fe u n y( H) r qec Gz

2 .1

2 .2

2 .3

Figure 11 Measured Noise Figure

1 .5 1

1 1

1 .5 0

G (d ain B)

1 0

9 .5

8 .5

8 -0 6

-0 5

-0 4

-0 3 -0 2 In u p wr( B ) pt o e d m

-0 1

1 0

Figure 12 Gain in different input power

7. Conclusion
It was two months from now when we start this project. Our group manages to apply what we learned in class to design an actual working amplifier. We learned the procedure how to initiate a project and finish it. We set up our design specifications accord to the mobile phone application. Several transistors were tried before the atf54143 was chosen. Simulation was then run to design the input and output match network. DC bias was added at last. Fabrication of the prototype circuit was carried out after the simulation. The overall performance of the amplifier is worse than the simulation results somehow. But we successfully remove the oscillation at the low frequency range.

8. Reference
[1] Guillermo Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, Prentice Hall [2] http://cp.literature.agilent.com/litweb/pdf/5980-1916E.pdf [3] http://www.arrad38.fr/datasheet/ATF54143.pdf

Appendix: R1 R2 R3 R4 R5 R122 C1 C2 C3 C4 C5 C6 Part Number 541-294FCT-ND RHM1.21KFRCT-ND 311-32.4FRCT-ND RHM47.5FRCT-ND RMCF1/810KJRCT-ND RMCF1/1010FRCT-ND 490-1303-1-ND 490-1303-1-ND 490-1303-1-ND 490-1303-1-ND 490-1303-1-ND 490-1303-1-ND Description RES 294 OHM 1/4W 1% 1206 SMD RES 1.21K OHM 1/4W 1% 1206 SMD RES 32.4 OHM 1/4W 1% 1206 SMD RES 47.5 OHM 1/4W 1% 1206 SMD RES 10K OHM 1/4W 5% 1206 SMD RES 10 OHM 1/8W 1% 0805 SMD CAP CER 1000PF 50V 10% X7R 0402 CAP CER 1000PF 50V 10% X7R 0402 CAP CER 1000PF 50V 10% X7R 0402 CAP CER 1000PF 50V 10% X7R 0402 CAP CER 1000PF 50V 10% X7R 0402 CAP CER 1000PF 50V 10% X7R 0402

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