Lesson 9

10 - RF Oscillators
The information in this work has been obtained from sources believed to be reliable. The author does not guarantee the accuracy or completeness of any information presented herein, and shall not be responsible for any errors, omissions or damages as a result of the use of this information.
April 2012
2006 by Fabian Kung Wai Lee
Main References
[1]* D.M. Pozar, Microwave engineering, 2nd Edition, 1998 John-Wiley & Sons. [2] J. Millman, C. C. Halkias, Integrated electronics, 1972, McGraw-Hill. [3] R. Ludwig, P. Bretchko, RF circuit design - theory and applications, 2000 Prentice-Hall. [4] B. Razavi, RF microelectronics, 1998 Prentice-Hall, TK6560. [5] J. R. Smith,Modern communication circuits,1998 McGraw-Hill. [6] P. H. Young, Electronics communication techniques, 5th edition, 2004 Prentice-Hall. [7] Gilmore R., Besser L.,Practical RF circuit design for modern wireless systems, Vol. 1 & 2, 2003, Artech House. [8] Ogata K., Modern control engineering, 4th edition, 2005, Prentice-Hall.
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Agenda
Positive feedback oscillator concepts. Negative resistance oscillator concepts (typically employed for RF oscillator). Equivalence between positive feedback and negative resistance oscillator theory. Oscillator start-up requirement and transient. Oscillator design - Making an amplifier circuit unstable. Constant |1| circle. Fixed frequency oscillator design. Voltage-controlled oscillator design.
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1.0 Oscillation Concepts
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Introduction
Oscillators are a class of circuits with 1 terminal or port, which produce a periodic electrical output upon power up. Most of us would have encountered oscillator circuits while studying for our basic electronics classes. Oscillators can be classified into two types: (A) Relaxation and (B) Harmonic oscillators. Relaxation oscillators (also called astable multivibrator), is a class of circuits with two unstable states. The circuit switches back-and-forth between these states. The output is generally square waves. Harmonic oscillators are capable of producing near sinusoidal output, and is based on positive feedback approach. Here we will focus on Harmonic Oscillators for RF systems. Harmonic oscillators are used as this class of circuits are capable of producing stable sinusoidal waveform with low phase noise.
April 2012 2006 by Fabian Kung Wai Lee 5
2.0 Overview of Feedback Oscillators
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Classical Positive Feedback Perspective on Oscillator (1)

Consider the classical feedback system with non-inverting amplifier, Assuming the feedback network and amplifier do not load each other, we can write the closed-loop transfer function as:
Non-inverting amplifier
Si(s)
+ +
E(s) A(s)
High impedance
So(s)
So ) (s ) = 1 AAs(sF (s ) (2.1a) () Si
Positive Feedback
Feedback network
High impedance
T (s ) = A(s )F (s ) (2.1b)
Loop gain (the gain of the system around the feedback loop)
F(s)
) Writing (2.1a) as: S o (s ) = 1 AAs()sF (s ) S i (s ) ( We see that we could get non-zero output at So, with Si = 0, provided 1-A(s)F(s) = 0. Thus the system oscillates!

The condition for sustained oscillation, and for oscillation to startup from positive feedback perspective can be summarized as:
For sustained oscillation For oscillation to startup
1 A(s )F (s ) = 0
Barkhausen Criterion
(2.2a) (2.2b)
A(s )F (s ) > 1
arg( A(s )F (s )) = 0
Take note that the oscillator is a non-linear circuit, initially upon power up, the condition of (2.2b) will prevail. As the magnitudes of voltages and currents in the circuit increase, the amplifier in the oscillator begins to saturate, reducing the gain, until the loop gain A(s)F(s) becomes one. A steady-state condition is reached when A(s)F(s) = 1.
Note that this is a very simplistic view of oscillators. In reality oscillators are non-linear systems. The steady-state oscillatory condition corresponds to what is called a Limit Cycle. See texts on non-linear dynamical systems.

Positive feedback system can also be achieved with inverting amplifier:
Inverting amplifier + -
Si(s)
E(s) -A(s) Inversion F(s)
So(s)
So ) (s ) = 1 AAs(sF (s ) () Si
To prevent multiple simultaneous oscillation, the Barkhausen criterion (2.2a) should only be fulfilled at one frequency. Usually the amplifier A is wideband, and it is the function of the feedback network F(s) to select the oscillation frequency, thus the feedback network is usually made of reactive components, such as inductors and capacitors.

In general the feedback network F(s) can be implemented as a Pi or T network, in the form of a transformer, or a hybrid of these. Consider the Pi network with all reactive elements. A simple analysis in [2] and [3] shows that to fulfill (2.2a), the reactance X1, X2 and X3 need to meet the following condition:
+ -
E(s)
-A(s)
So(s)
X 3 = ( X 1 + X 2 ) (2.3)
X3
If X3 represents inductor, then X1 and X2 should be capacitors. X2
X1
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Classical Feedback Oscillators
+ -
The following are examples of oscillators, based on the original circuit using vacuum tubes.
+ + -
Colpitt oscillator
+
Armstrong oscillator
Hartley oscillator Clapp oscillator
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Example of Tuned Feedback Oscillator (1)

A 48 MHz Transistor Common -Emitter Colpitt Oscillator
R RC R=330 Ohm
2.0 1.5 1.0
VB, V VL, V
VL R RL R=220 Ohm
V_DC SRC1 Vdc=3.3 V R RB1 R=10 kOhm
C CD1 C=0.1 uF
0.5 0.0 -0.5
VC C Cc2 C=0.01 uF pb_mot_2N3904_19921211 Q1 R RB2 R=10 kOhm R RE R=220 Ohm C CE C=0.01 uF
-1.0 -1.5
VB C Cc1 C=0.01 uF
A( )F ( )
1 0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
time, usec
t E(s) -A(s) So(s)
Si(s)
L C L1 C1 L=2.2 uH C=22.0 pF R= C C2 C=22.0 pF
+ -
F(s)

A 27 MHz Transistor Common-Base Colpitt Oscilator
600 400 200
V_DC SRC1 Vdc=3.3 V R RB1 R=10 kOhm C CD1 C=0.1 uF
VE, mV VL, mV
L L1 L=1.0 uH R= C C3 C=4.7 pF R R1 R=1000 Ohm
R RC R=470 Ohm
0 -200 -400 -600 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VC C Cc2 C=0.1 uF pb_m ot_2N3904_19921211 Q1 VE R RE R=100 Ohm
VL C C1 C=100.0 pF
VB C Cc1 C=0.1 uF
R RB2 R=4.7 kOhm
C C2 C=100.0 pF
time, usec
Si(s)
+ +
E(s) A(s)
So(s)
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F(s)
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V_DC SRC1 Vdc=3.3 V R RB1 R=10 kOhm C CD1 C=0.1 uF
A 16 MHz Transistor Common-Emitter Crystal Oscillator
R RC R=330 Ohm
VC C Cc2 C=0.1 uF pb_mot_2N3904_19921211 Q1 R RB2 R=10 kOhm R RE R=220 Ohm C CE C=0.1 uF
VL R RL R=220 Ohm
VB C Cc1 C=0.1 uF
C C1 C=22.0 pF
sx_stk_CX-1HG-SM_A_19930601 XTL1 Fres=16 MHz
C C2 C=22.0 pF
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Limitation of Feedback Oscillator

At high frequency, the assumption that the amplifier and feedback network do not load each other is not valid. In general the amplifiers input impedance decreases with frequency, and its output impedance is not zero. Thus the actual loop gain is not A(s)F(s) and equation (2.2) breakdowns. Determining the loop gain of the feedback oscillator is cumbersome at high frequency. Moreover there could be multiple feedback paths due to parasitic inductance and capacitance. It can be difficult to distinguish between the amplifier and the feedback paths, owing to the coupling between components and conductive structures on the printed circuit board (PCB) or substrate. Generally it is difficult to physically implement a feedback oscillator once the operating frequency is higher than 500MHz.
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3.0 Negative Resistance Oscillators
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Introduction (1)
An alternative approach is needed to get a circuit to oscillate reliably. We can view an oscillator as an amplifier that produces an output when there is no input. Thus it is an unstable amplifier that becomes an oscillator! For example lets consider a conditionally stable amplifier. Here instead of choosing load or source impedance in the stable regions of the Smith Chart, we purposely choose the load or source impedance in the unstable impedance regions. This will result in either |1 | > 1 or |2 | > 1. The resulting amplifier circuit will be called the Destabilized Amplifier. As seen in Chapter 7, having a reflection coefficient magnitude for 1 or 2 greater than one implies the corresponding port resistance R1 or R2 is negative, hence the name for this type of oscillator.
Introduction (2)
For instance by choosing the load impedance ZL at the unstable region, we could ensure that |1 | > 1. We then choose the source impedance properly so that |1 s | > 1 and oscillation will start up (refer back to Chapter 7 on stability theory). Once oscillation starts, an oscillating voltage will appear at both the input and output ports of a 2-port network. So it does not matter whether we enforce |1 s | > 1 or |2 L | > 1, enforcing either one will cause oscillation to occur (It can be shown later that when |1 s | > 1 at the input port, |2 L | > 1 at the output port and vice versa). The key to fixed frequency oscillator design is ensuring that the criteria |1 s | > 1 only happens at one frequency (or a range of intended frequencies), so that no simultaneous oscillations occur at other frequencies.
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Recap - Wave Propagation Stability Perspective (1)

From our discussion of stability from wave propagation in Chapter 7
Zs or s Source b1
Port 1 Port 2
2-port Network
a1 = bs + bs 1s + bs 12s 2 + ... bs a1 = 1 1s
b1 = bs 1 + bs 12s + bs 13s 2 + ... b1 = bs 1 1 1s 1 1 1s
Z1 or 1
bs
a1
bs1
bss 1
bss 12
b 1= bs
bss 212
bss 213
Compare with equation (2.1a)
bss 313
bss 314
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So ) (s ) = 1 AAs(sF (s ) () Si
Similar mathematical form

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Recap - Wave Propagation Stability Perspective (2)

We see that the infinite series that constitute the steady-state incident (a1) and reflected (b1) waves at Port 1 will only converge provided | s1| < 1. These sinusoidal waves correspond to the voltage and current at the Port 1. If the waves are unbounded it means the corresponding sinusoidal voltage and current at the Port 1 will grow larger as time progresses, indicating oscillation start-up condition. Therefore oscillation will occur when | s1 | > 1. Similar argument can be applied to port 2 since the signals at Port 1 and 2 are related to each other in a two-port network, and we see that the condition for oscillation at Port 2 is |L2 | > 1.
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10
Oscillation from Negative Resistance Perspective (1)

Generally it is more useful to work with impedance (or admittance) when designing actual circuit. Furthermore for practical purpose the transmission lines connecting ZL and Zs to the destabilized amplifier are considered very short (length 0). In this case the impedance Zo is ambiguous (since there is no transmission line). To avoid this ambiguity, let us ignore the transmission line and examine the condition for oscillation phenomena in terms of terminal impedance.
Very short Tline
Zs
Zo
Z1
Destabilized Amp. and Load
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Z Z s Z Z1
21

We consider Port 1 as shown, with the source network and input of the amplifier being modeled by impedance or series networks.
Zs jXs Source Rs Network V R1 Port 1 Z1 Amplifier with load ZL
jX1 Vamp
Z2 ZL
Port 2
Using circuit theory the voltage at Port 1 can be written as:

V=
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R1 + jX 1 Z1 Vs = Vs R1 + Rs + j ( X 1 + X s ) Z s + Z1
(3.1)
22
11

Furthermore we assume the source network Zs is a series RC network and the equivalent circuit looking into the amplifier Port 1 is a series RL network.
Zs Z1 Cs Rs V Vs R1 L1
Vamp
Z2 ZL
Using Laplace Transform, (3.1) is written as: R1 + sL1 (3.2a) V (s ) = Vs (s ) 1 R1 + Rs + sL1 + sC s (3.2b) where s = + j

The expression for V(s) can be written in the standard form according to Control Theory [8]: 2 V 1 (s ) = 1 2 s(RR +RsL1 ) 1 = sCs (R1 + sL1 )n (3.3a) + 2 2 Vs L1 s + s ( L ) + L C s + 2ns + n
1 s 1 1 s
where
R1 + Rs 2 L1 Cs
= Damping Factor
n =
1 L1C s
= Natural Frequency
(3.3b)
The transfer function V(s)/Vs(s) is thus a 2nd order system with two poles p1, p2 given by: 2
p1, 2 = n n 1
(3.4)
Observe that if (R1 + Rs) < 0 the damping factor is negative. This is true if R1 is negative, and |R1| > Rs. R1 can be made negative by modifying the amplifier circuit (e.g. adding local positive feedback), producing the sum R1 + Rs < 0.
12

Assuming ||<1 (under-damped), the poles as in (3.4) will be complex and exist at the right-hand side of the complex plane. From Control Theory such a system is unstable. Any small perturbation will result in a oscillating signal with frequency n 2 1 that grows exponentially. A small disturbance Im
v(t)
Rs + R1 | o < 0
0
Complex pole pair
or impulse starts the exponentially growing sinusoid
Re
t
Time Domain
Complex Plane
Usually a transient or noise signal from the environment will contain a small component at the oscillation frequency. This forms the seed in which the oscillation builts up.

When the signal amplitude builds up, nonlinear effects such as transistor saturation and cut-off will occur, this limits the of the transistor and finally limits the amplitude of the oscillating signal. The effect of decreasing of the transistor is a reduction in the magnitude of R1 (remember R1 is negative). Thus the damping factor will approach 0, since Rs+ R1 0. Steady-state sinusoidal oscillation is achieved when =0, or equivalently the poles become
p1, 2 =0 = jn
The steady-state oscillation frequency o corresponds to n,
n 2 = L11 s n L1 = n1Cs X 1 = X s C
X1 + X s = 0
o
13

From (3.3b), we observe that the steady-state oscillation frequency is determined by L1 and Cs, in other words, X1 and Xs respectively. Since the voltages at Port 1 and Port 2 are related, if oscillation occur at Port 1, then oscillation will also occur at Port 2. From this brief discussion, we use RC and RL networks for the source and amplifier input respectively, however we can distill the more general requirements for oscillation to start-up and achieve steadystate operation for series representation in terms of resistance and reactance:
Rs + R1 |o < 0
X s + X 1 | o = 0
Start-up
(3.5a) (3.5b)
Rs + R1 |o = 0
X s + X 1 | o = 0
Steady-state
(3.6a) (3.6b)
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Illustration of Oscillation Start-Up and Steady-State

The oscillation start-up process and steady-state are illustrated.
1.4 1.2 1.0
0.8
0.6
0.4
0.2
0.0
-0. 2
-0. 4
-0. 6
-0. 8 0 10 20 30 40 50 60 70 80 90 10 0 110 120
R1+Rs
0
Oscillation start-up
Steady-state
Zs Z1 Zs t Destabilized Amplifier
ZL
We need to note that this is a very simplistic view of oscillators. Oscillators are autonomous non-linear dynamical systems, and the steady-state condition is a form of Limit Cycles.
14
Summary of Oscillation Requirements Using Series Network

By expressing Zs and Z1 in terms of resistance and reactance, we conclude that the requirement for oscillation are.
Zs jXs Source Rs Network V R1 Port 1 Z1 jX1 Vamp
Z2 ZL
Port 2
Rs + R1 |o = 0
X s + X 1 | o = 0
Steady-state
(3.6a) (3.6b)
Rs + R1 |o < 0
X s + X 1 | o = 0
Start-up
(3.5a) (3.5b)
A similar expression for Z2 and ZL can also be obtained, but we shall not be concerned with these here. by Fabian Kung Wai Lee April 2012 2006 29
The Resonator
The source network Zs is usually called the Resonator, as it is clear that equations (3.5b) and (3.6b) represent the resonance condition between the source network and the amplifier input. The design of the resonator is extremely important. We shall see later that an important parameter of the oscillator, the Phase Noise is dependent on the quality of the resonator.
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15
Summary of Oscillation Requirements Using Parallel Network

If we model the source network and input to the amplifier as parallel networks, the following dual of equations (3.5) and (3.6) are obtained.
Port 1 Gs jBs V Z2 G1 jB1 Vamp ZL
The start-up and steady-state conditions are:
Gs + G1 |o = 0
Bs + B1 |o = 0
Steady-state
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(3.7a) (3.7b)
Gs + G1 |o < 0
(3.8a) (3.8b)
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Bs + B1 |o = 0
Start-up
Series or Parallel Representation? (1)

The question is which to use? Series or parallel network representation? This is not an easy question to answer as the destabilized amplifier is operating in nonlinear region as oscillator. Concept of impedance is not valid and our discussion is only an approximation at best. We can assume series representation, and worked out the corresponding resonator impedance. If after computer simulation we discover that the actual oscillating frequency is far from our prediction (if theres any oscillation at all!), then it probably means that the series representation is incorrect, and we should try the parallel representation. Another clue to whether series or parallel representation is more accurate is to observe the current and voltage in the resonator. For series circuit the current is near sinusoidal, where as for parallel circuit it is the voltage that is sinusoidal.
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Series or Parallel Representation? (2)

Reference [7] illustrates another effective alternative, by computing the large-signal S11 of Port 1 (with respect to Zo) using CAD software. 1/S11 is then plotted on a Smith Chart as a function of input signal magnitude at the operating frequency. By comparing the locus of 1/S11 as input signal magnitude is gradually increased with the coordinate of constant X or constant B circles on the Smith Chart, we can decide whether series or parallel form approximates Port 1 best. We will adopt this approach, but plot S11 instead of 1/S11. This will be illustrated in the examples in next section. Do note that there are other reasons that can cause the actual oscillation frequency to deviate a lot from prediction, such as frequency stability issue (see [1] and [7]).
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4.0 Fixed Frequency Negative Resistance Oscillator Design
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17
Procedures of Designing Fixed Frequency Oscillator (1)

Step 1 - Design a transistor/FET amplifier circuit. Step 2 - Make the circuit unstable by adding positive feedback at radio frequency, for instance, adding series inductor at the base for commonbase configuration. Step 3 - Determine the frequency of oscillation o and extract Sparameters at that frequency. Step 4 With the aid of Smith Chart and Load Stability Circle, make R1 < 0 by selecting L in the unstable region. Step 5 (Optional) Perform a large-signal analysis (e.g. Harmonic Balance analysis) and plot large-signal S11 versus input magnitude on Smith Chart. Decide whether series or parallel form to use. Step 6 - Find Z1 = R1 + jX1 (Assuming series form).
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Procedures of Designing Fixed Frequency Oscillator (2)

Step 7 Find Rs and Xs so that R1 + Rs<0, X1 + Xs=0 at o. We can use the rule of thumb Rs=(1/3)|R1| to control the harmonics content at steady-state. Step 8 - Design the impedance transformation network for Zs and ZL. Step 9 - Built the circuit or run a computer simulation to verify that the circuit can indeed starts oscillating when power is connected. Note: Alternatively we may begin Step 4 using Source Stability Circle, select s in the unstable region so that R2 or G2 is negative at o .
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18
Making an Amplifier Unstable (1)

An amplifier can be made unstable by providing some kind of local positive feedback. Two favorite transistor amplifier configurations used for oscillator design are the Common-Base configuration with Base feedback and Common-Emitter configuration with Emitter degeneration.
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This is a practical model of an inductor Base bypass capacitor
V_DC SRC1 Vdc=4.5 V
At 410MHz
DC
DC DC1
S-PARAMETERS
S_Param SP1 Start=410.0 MHz Stop=410.0 MHz Step=2.0 MHz
SStabCircle
S_StabCircle S_StabCircle1 SSC=s_stab_circle(S,51)
StabFact
Common Base Configuration
R Rb1 R=10 kOhm
L LC L=330.0 nH R=
StabFact StabFact1 K=stab_fact(S)
LStabCircle
L_StabCircle L_StabCircle1 LSC=l_stab_circle(S,51) Vout
C Cc2 C=10.0 nF L LB L=22 nH R= R RLB R=0.77 Ohm C Cb C=10.0 nF
Term Term2 Num=2 Z=50 Ohm
C CLB C=0.17 pF
pb_phl_BFR92A_19921214 Q1 R Rb2 L R=4.7 kOhm LE L=330.0 nH R=
Vin C Cc1 C=10.0 nF
An inductor is added in series with the bypass capacitor on the base terminal of the BJT. This is a form of positive series feedback.
Positive feedback here

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R Re R=100 Ohm
38
19

s22 and s11 have magnitude > 1
S(1,2) 0.162 / 166.9... S(2,1) 2.068 / -12.723 S(2,2) 1.154 / -3.535
freq 410.0MHz freq 410.0MHz
K -0.987 S(1,1) 1.118 / 165.6...
L Plane
Unstable Regions
s Plane
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DC
DC DC1
S-PARAMETERS
S_Param SP1 Start=410.0 MHz Stop=410.0 MHz Step=2.0 MHz
SStabCircle
S_StabCircle S_StabCircle1 SSC=s_stab_circle(S,51)
V_DC SRC1 Vdc=4.5 V
StabFact
R Rb1 R=10 kOhm
L LC L=330.0 nH R=
StabFact StabFact1 K=stab_fact(S)
LStabCircle
L_StabCircle L_StabCircle1 LSC=l_stab_circle(S,51) Vout
C Cc1 C=1.0 nF Term Term1 Num=1 Z=50 Ohm
C Cc2 C=1.0 nF pb_phl_BFR92A_19921214 Q1 C Ce1 C=15.0 pF
R Rb2 R=4.7 kOhm
Feedback
R Re R=100 Ohm
C Ce2 C=10.0 pF
Common Emitter Configuration Positive feedback here

40
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S22 and S11 have magnitude > 1
freq 410.0MHz freq 410.0MHz K -0.516 S(1,1) 3.067 / -47.641 S(1,2) 0.251 / 62.636 S(2,1) 6.149 / 176.803 S(2,2) 1.157 / -21.427
L Plane
s Plane
Unstable Regions
Precautions
The requirement Rs= (1/3)|R1| is a rule of thumb to provide the excess gain to start up oscillation. Rs that is too large (near |R1| ) runs the risk of oscillator fails to start up due to component characteristic deviation. While Rs that is too small (smaller than (1/3)|R1|) causes too much nonlinearity in the circuit, this will result in large harmonic distortion of the output waveform.
V2
Clipping, a sign of too much nonlinearity t
V2 Rs too small For more discussion about the Rs = (1/3)|R1| rule, and on the sufficient condition for oscillation, see [6], which list further requirements.
April 2012 2006 by Fabian Kung Wai Lee
Rs too large
42
21
Aid for Oscillator Design - Constant |1| Circle (1)

In choosing a suitable L to make |L | > 1, we would like to know the range of L that would result in a specific |1 |. It turns out that if we fix |1 |, the range of load reflection coefficient that result in this value falls on a circle in the Smith chart for L . The radius and center of this circle can be derived from:
S D 1 = 11 L 1 S 22L
Assuming = |1 |:
By fixing |1 | and changing L .
Tcenter =
2 S 22* + D*S11 D S 22
2 2 2
(4.1a)
Radius =
S12 S 21 D 2 S 22
2 2
(4.1b)
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Aid for Oscillator Design - Constant |1| Circle (2)

The Constant |1 | Circle is extremely useful in helping us to choose a suitable load reflection coefficient. Usually we would choose L that would result in |1 | = 1.5 or larger. Similarly Constant |2 | Circle can also be plotted for the source reflection coefficient. The expressions for center and radius is similar to the case for Constant |1 | Circle except we interchange s11 and s22, L and s . See Ref [1] and [2] for details of derivation.
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22
Example 4.1 CB Fixed Frequency Oscillator Design

In this example, the design of a fixed frequency oscillator operating at 410MHz will be demonstrated using BFR92A transistor in SOT23 package. The transistor will be biased in Common-Base configuration. It is assumed that a 50 load will be connected to the output of the oscillator. The schematic of the basic amplifier circuit is as shown in the following slide. The design is performed using Agilents ADS software, but the author would like to stress that virtually any RF CAD package is suitable for this exercise.
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Example 4.1 Cont...

Step 1 and 2 - DC biasing circuit design and S-parameter extraction.
DC
DC D C1
S-PAR AME T ER S
S t ab F ac t
S_Param SP1 Start=410. 0 MH z Stop=410.0 MHz Step=2. 0 MH z
StabFact StabFact 1 K=st ab_f act (S )
V_DC SR C1 Vdc =4.5 V
R Rb1 R=10 kO hm
L LC L=330.0 nH R=
Port 2 - Output
Term Term 2 Num=2 Z=50 Ohm
LSt abCircle
L_St abCircle L_St abCircle1 load_s tabcir=l_s tab_c irc le(S, 51)
C Cc2 C =1. 0 nF L LB L=12. 0 nH R= C Cb C =1.0 nF R Rb2 R=4.7 kOhm
SStabCircle
pb_phl_BF R 92A_19921214 Q1 L LE L=220.0 nH R=
S_StabCircle S_StabCircle1 source_s tabc ir=s_st ab_c irc le(S ,51)
LB is chosen carefully so that the unstable regions in both L and s planes are large April enough. 2012
C Cc1 C =1. 0 nF
Term Term 1 Num=1 Z=50 O hm
Port 1
Amplifier
Port 2
R Re R =100 Ohm
Port 1 - Input
2006 by Fabian Kung Wai Lee 46
23
Example 4.1 Cont...

freq 410.0MHz freq 410.0MHz K -0.987 S(1,1) 1.118 / 165.6... S(1,2) 0.162 / 166.9... S(2,1) 2.068 / -12.723 S(2,2) 1.154 / -3.535
Unstable Regions
Load impedance here will result in |1| > 1

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Source impedance here will result in |2| > 1

47
Example 4.1 Cont...

Step 3 and 4 - Choosing suitable L that cause |1 | > 1 at 410MHz. We plot a few constant |1 | circles on the L plane to assist us in choosing a suitable load reflection coefficient.
This point is chosen because it is on real line and easily matched.
LSC |1 |=1.5 |1 |=2.0
L = 0.5<0
ZL = 150+j0
L Plane
|1 |=2.5 Note: More difficult to implement load impedance near edges of Smith Chart
48
24
Example 4.1 Cont...

Step 5 To check whether the input of the destabilized amplifier is closer to series or parallel form. We perform large-signal analysis and observe the S11 at the input of the destabilized amplifier.
LSSP
Var Eqn
V_DC SRC1 Vdc=4.5 V R RB1 R=10 kOhm L LC L=330.0 nH R=
LSSP HB1 Freq[1]=410.0 MHz Order[1]=5 LSSP_FreqAtPort[1]= SweepVar="Poutv" Start=-20 Stop=-5 Step=0.2
VAR VAR1 Poutv=-10.0
Large-signal S-parameter Analysis control in ADS software.
C Cc2 C=1.0 nF L LB L=12.0 nH R= C CB C=1.0 nF R RB2 R=4.7 kOhm
R RL R=150 Ohm
pb_phl_BFR92A_19921214 Q1 L LE L=220.0 nH R= C Cc1 C=1.0 nF
We are measuring large-signal S11 looking towards here P_1Tone

PORT1 Num=1 Z=50 Ohm P=polar(dbmtow(Poutv),0) Freq=410 MHz
R RE R=100 Ohm
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49
Example 4.1 Cont...

Compare the locus of S11 and the constant X and constant B circles on the Smith Chart, it is clear the locus is more parallel to the constant X circle. Also the direction of S11 is moving from negative R to positive R as input power level is increased. We conclude the Series form is more appropriate. Compare Region where R or G is negative
1 1
Direction of S11 as magnitude of P_1tone source is increased

S(1,1)
Boundary of Normal Smith Chart
Locus of S11 versus P_1tone power at 410MHz (from -20 to -5 dBm)

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Region where R1 or G1 is positive

Poutv (-20.000 to -5.000)
25
Example 4.1 Cont...

Step 6 Using the series form, we find the small-signal input impedance Z1 at 410MHz. So the resonator would also be a series network. For ZL = 150 or L = 0.5<0: S DL 1 = 11 = 1.422 + j 0.479 1 S 22 L
Z1 = Z o
1 + 1 = 10.257 + j 7.851 1 1
R1
X1
Step 7 - Finding the suitable source impedance to fulfill R1 + Rs<0, X1 + Xs=0: 1
Rs =
R1 3.42 3 X s = X1 7.851
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Example 4.1 Cont...

The system block diagram:
Port 1 Zs = 3.42-j7.851 Port 2
Common-Base (CB) Amplifier with feedback
ZL = 150
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26
Example 4.1 Cont...

Step 5 - Realization of the source and load impedance at 410MHz.
Zs= 3.42-j7.851 49.44pF ZL=150 27.27nH
3.42
CB Amplifier @ 410MHz
3.49pF
50
1 C 1 C= = 49.44 pF 7.851 7.851 =

Impedance transformation network

53
Example 4.1 Cont... - Verification Thru Simulation
Vpp
BFR92A
Vpp = 0.9V V = 0.45V Power dissipated in the load:
PL = = 0.5
1V 2 RL
0.452 = 2.025mW 50 54
27
Example 4.1 Cont... - Verification Thru Simulation

Performing Fourier Analysis on the steady state wave form:
The waveform is very clean with little harmonic distortion. Although we may have to tune the capacitor Cs to obtain oscillation at 410 MHz.
484 MHz
Example 4.1 Cont... The Prototype

Voltage at the base terminal and 50 Ohms load resistor of the fixed frequency oscillator:
1.4
1.2
1.0
Vbb
0.8
0.6
0.4
0.2
0.0
-0.2
Vout
-0.4
Output port
20 30 40 50 60 70 80 90 100 110 120
-0.6
-0.8 0 10
Startup transient ns
28
Example 4.2 450 MHz CE Fixed Frequency Oscillator Design

Small-signal AC or S-parameter analysis, to show that R1 or G1 is negative at the intended oscillation frequency of 450 MHz.
0
S-PARAMETERS
V_DC SRC1 Vdc=3.0 V R RB R=47 kOhm S_Param SP1 Start=100.0 MHz Stop=800.0 MHz Step=10.0 MHz
-100 -500
real(Z(1,1))
L LC L=220.0 nH R=
Selection of load resistor as in Example 4.1.
imag(Z(1,1))
-200 -300 -400 -1500 -500 -1000
C Cc2 C=330.0 pF DC_Block DC_Block1 Term Term1 Num=1 Z=50 Ohm
R RL R=150 Ohm
-600 100 200 300 400 500 600 700 800
-2000
freq, MHz
C C1 C=2.2 pF pb_phl_BFR92A_19921214 Q1
C C2 C=4.7 pF
There are simplified expressions to find C1 and C2, see reference [5]. R Here we just trial and RE R=220 Ohm error to get some reasonable values.
0.000
0.020
0.015
imag(Y(1,1))
real(Y(1,1))
-0.005 0.010 -0.010 0.005
Destabilized amplifier
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-0.015 100 200 300 400 500 600 700 800
0.000
freq, MHz
57
Example 4.2 Cont

The large-signal analysis to check for suitable representation.
LSSP
LSSP HB1 Freq[1]=450.0 MHz Order[1]=7 LSSP_FreqAtPort[1]= Sw eepVar="Poutv" Start=-5 Stop=15 Step=0.2
Var Eqn
VAR VAR1 Poutv=-10.0
V_DC SRC1 Vdc=3.0 V R RB R=47 kOhm L LC L=220.0 nH R=
Since the locus of S11 is close in shape to constant X circles, and it indicates R1 goes from negative value to positive values as input power is increased, we use series form to represent the input network looking towards the Base of the amplifier.
S11
DC_Block DC_Block1 P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow (Poutv),0) Freq=450 MHz
C Cc2 C=330.0 pF
R RL R=150 Ohm
S(1,1)
C C1 C=2.2 pF
pb_phl_BFR92A_19921214 Q1
Compare
C C2 C=4.7 pF R RE R=220 Ohm
Boundary of Normal Smith Chart

Poutv (-5.000 to 15.000)
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Direction of S11 as magnitude of P_1tone source is increased 58 from -5 to +15 dBm
29
Example 4.2 Cont

Using a series RL for the resonator, and performing time-domain simulation to verify that the circuit will oscillate.
VtPWL SRC2 V_Tran=pw l(time, 0ns,0V, 2ns,0.1V, 4ns,0V)
t
1.0
TRANSIENT
V_DC SRC1 Vdc=3.0 V
R RB R=47 kOhm
Tran Tran1 StopTime=100.0 nsec L MaxTimeStep=1.0 nsec LC L=220.0 nH R= VC C Cc2 C=330.0 pF VL R RL R=150 Ohm
0.5
VL, V
0.0 -0.5 -1.0 -1.5 0 20
vL(t)
VB C Cc1 L C=1.0 nF L1 L=39.0 nH R=10
40
60
80
100
C C1 C=2.2 pF
pb_phl_BFR92A_19921214 Q1
Eqn VfL=fs(VL)
0.8
m1 freq= 450.0MHz mag(VfL)=0.733
time, nsec
m1
C C2 C=4.7 pF
R RE R=220 Ohm
0.6
Large coupling capacitor

mag(VfL)
0.4
|VL(f)|
0.2
0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
59
freq, GHz
Example 4.3 Parallel Representation

An example where the network looking into the Base of the destabilized amplifier is more appropriate as parallel RC network.
Var VAR Eqn LSSP VAR5 Poutv=1.0 LSSP fo=2300 HB1 Freq[1]=fo MHz Order[1]=8 LSSP_FreqAtPort[1]=fo MHz SweepVar="Poutv" Start=-7 Stop=12 Step=0.2
V_DC VCC Vdc=3.3 V R RB1 R=1000 Ohm
S11
P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow(Poutv),0) R Freq=fo MHz RB2 R=1000 Ohm C Cc1 C=1.2 pF C C1 C=0.6 pF {t}
C Cc2 C=1.0 pF pb_phl_BFR92A_19921214 Q1
R RL R=50 Ohm
Direction of S11 as magnitude of P_1tone source is increased from -7 to +12 dBm
S(1,1)
C Cdec1 C=100.0 pF L LC L=2 nH R=0.2
Compare
R C RE C2 R=100 Ohm C=0.7 pF {t}
Poutv (-7.000 to 12.000)
S11 versus Input power

60
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Frequency Stability
The process of oscillation depends on the non-linear behavior of the negative-resistance network. The conditions discussed, e.g. equations (3.1), (3.8), (3.9), (3.10) and (3.11) are not enough to guarantee a stable state of oscillation. In particular, stability requires that any perturbation in current, voltage and frequency will be damped out, allowing the oscillator to return to its initial state. The stability of oscillation can be expressed in terms of the partial derivative of the sum Zin + Zs or Yin + Ys of the input port (or output port). The discussion is beyond the scope of this chapter for now, and the reader should refer to [1] and [7] for the concepts.
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Some Steps to Improve Oscillator Performance

To improve the frequency stability of the oscillator, the following steps can be taken. Use components with known temperature coefficients, especially capacitors. Neutralize, or swamp-out with resistors, the effects of active device variations due to temperature, power supply and circuit load changes. Operate the oscillator on lower power. Reduce noise, use shielding, AGC (automatic gain control) and biasline filtering. Use an oven or temperature compensating circuitry (such as thermistor). Use differential oscillator architecture (see [4] and [7]).
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31
Extra References for This Section

Some recommended journal papers on frequency stability of oscillator: Kurokawa K., Some basic characteristics of broadband negative resistance oscillator circuits, Bell System Technical Journal, pp. 19371955, 1969. Nguyen N.M., Meyer R.G., Start-up and frequency stability in highfrequency oscillators,IEEE journal of Solid-State Circuits, vol 27, no. 5 pp.810-819, 1992. Grebennikov A. V., Stability of negative resistance oscillator circuits, International journal of Electronic Engineering Education, Vol. 36, pp. 242-254, 1999.
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Reconciliation Between Feedback and Negative Resistance Oscillator Perspectives

It must be emphasized that the circuit we obtained using negative resistance approach can be cast into the familiar feedback form. For instance an oscillator circuit similar to Example 4.2 can be redrawn as:
V_DC VCC Vdc=3.0 V
Negative Resistance Oscillator

L LC L=2.2 nH {t} R=0.2 R RB1 R=10000 Ohm {t} C Cc2 C=1.0 pF R RL R=50 Ohm
V_DC VCC Vdc=3.0 V L LC L=2.2 nH {t} R=0.2 R RB1 R=10000 Ohm {t}
Amplifier
VL R RL R=50 Ohm
VL
C Cc2 C=1.0 pF pb_phl_BFR92A_19921214 Q1
L L1 L=15.0 nH {t} R=0.1
pb_phl_BFR92A_19921214 Q1 C Cc1 C=4.7 pF C C1 C=1.0 pF {t}

C Cc1 C=4.7 pF C C1 C=1.0 pF {t}
R RE R=100 Ohm {t}
C C2 C=0.8 pF {t}
R RE R=100 Ohm {t}
L L1 L=15.0 nH {t} R=0.1
C C2 C=0.8 pF {t}
Feedback Network
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32
5.0 Voltage Controlled Oscillator
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About the Voltage Controlled Oscillator (VCO) (1)

A simple transistor VCO using Clapp-Gouriet or CE configuration will be designed to illustrate the principles of VCO. The transistor chosen for the job is BFR92A, a wide-band NPN transistor which comes in SOT-23 package. Similar concepts as in the design of fixed-frequency oscillators are employed. Where we design the biasing of the transistor, destabilize the network and carefully choose a load so that from the input port (Port 1), the oscillator circuit has an impedance (assuming series representation is valid):
Z1 ( ) = R1 ( ) + jX 1 ( )
Of which R1 is negative, for a range of frequencies from 1 to 2.

Lower
Upper
66
33
Zs
Clapp-Gouriet Oscillator Circuit with Load
ZL
Z1 = R1 + jX1
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If we can connect a source impedance Zs to the input port, such that within a range of frequencies from 1 to 2:
Z s ( ) = Rs ( ) + jX s ( ) Rs ( ) < R1 ( ) R1 ( ) < 0
X s ( ) = X 1 ( )
The circuit will oscillate within this range of frequencies. By changing the value of Xs, one can change the oscillation frequency.
The rationale is that only the initial spectral of the noise signal fulfilling Xs = X1 will start the oscillation.
For example, if X1 is positive, then Xs must be negative, and it can be generated by a series capacitor. By changing the capacitance, one can change the oscillation frequency of the circuit. If X1 is negative, Xs must be positive. A variable capacitor in series with a suitable inductor will allow us to adjust the value of Xs.
34
Schematic of the VCO

Initial noise source to start the oscillation
DC
DC D C1
T R ANS IE NT
Tran Tran1 StopTim e=100. 0 ns ec MaxTimeS tep=1.2 nsec
P ARAM ET ER SWEEP
ParamSweep Sweep1 SweepVar="R load" SimI ns tanc eNam e[1] ="Tran1" SimI ns tanc eNam e[2] = SimI ns tanc eNam e[3] = SimI ns tanc eNam e[4] = SimI ns tanc eNam e[5] = SimI ns tanc eNam e[6] = St art=100 St op=700 V ar VAR E qn St ep=100 VAR 1 X=1. 0 R load=100
VtP WL Vtrig V_Tran=pwl(t ime, 0ns , 0V, 1ns,0. 01V, 2ns ,0V) R Rb R=47 k Ohm V_DC Vcc Vdc =3.0 V
L Lc L=220.0 nH R=
Variable capacitance tuning network
L L2 L=47. 0 nH R=
R C Rout C c2 C =330. 0 pF R=50 O hm R RL R=Rload
C Cb1 C=2. 2 pF
pb_phl_BF R92A_19921214 Q1
C Cb3 C=4. 7 pF C Cb2 C=10. 0 pF
R Re R=220 O hm
R V _D C R1 R=4700 Ohm S RC1 V dc=-1.5 V
di_s ms _bas 40_19930908 D1 C C b4 C =4.7 pF
2-port network
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More on the Schematic

L2 together with Cb3, Cb4 and the junction capacitance of D1 can produce a range of reactance value, from negative to positive. Together these components form the frequency determining network. Cb4 is optional, it is used to introduce a capacitive offset to the junction capacitance of D1. R1 is used to isolate the control voltage Vdc from the frequency determining network. It must be a high quality SMD resistor. The effectiveness of isolation can be improved by adding a RF choke in series with R1 and a shunt capacitor at the control voltage. Notice that the frequency determining network has no actual resistance to counter the effect of |R1()|. This is provided by the loss resistance of L2 and the junction resistance of D1.
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35
Time Domain Result
1.0
0.5
0.0
-0.5
-1.0
-1.5 0 10 20 30 40 50 60 70 80 90 100
Vout when Vdc = -1.5V
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Load-Pull Experiment
Peak-to-peak output voltage versus Rload for Vdc = -1.5V.
Vout(pp)
1 100 200 300 400 500 600 700 800
RLoad
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36
Controlling Harmonic Distortion (1)

Since the resistance in the frequency determining network is too small, large amount of non-linearity is needed to limit the output voltage waveform, as shown below there is a lot of distortion.
Vout
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The distortion generates substantial amount of higher harmonics. This can be reduced by decreasing the positive feedback, by adding a small capacitance across the collector and base of transistor Q1. This is shown in the next slide.
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37

The observant person would probably notice that we can also reduce the harmonic distortion by introducing a series resistance in the tuning network. However this is not advisable as the phase noise at the oscillators output will increase ( more about this later). Control voltage Vcontrol
Capacitor to control positive feedback

DC DC1
DC
TRANSIENT
Tran Tran1 StopTime=280.0 nsec MaxTimeStep=1.2 nsec
VtPWL L Vtrig Lc V_Tran=pwl(time, 0ns, 0V, 1ns,0.01V, 2ns,0V) L=220.0 nH R R= Rb R=47 kOhm I_Probe V_DC I_Probe Iload Vcc IC Vdc=3.0 V C Ccb C=1.0 pF L L2 L=47.0 nH C R= Cb1 pb_phl_BFR92A_19921214 C=6.8 pF Q1 C Cb3 C=4.7 pF C Cb2 C=10.0 pF R Re R=220 Ohm
C Cc2 C=330.0 pF
R Rout R=50 Ohm
R RL R=50 Ohm
R R1 V_DC R=4700 Ohm SRC1 Vdc=0.5 V
di_sms_bas40_19930908 D1 C Cb4 C=0.7 pF
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The output waveform Vout after this modification is shown below:
Vout
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38

Finally, it should be noted that we should also add a low-pass filter (LPF) at the output of the oscillator to suppress the higher harmonic components. Such LPF is usually called Harmonic Filter. Since the oscillator is operating in nonlinear mode, care must be taken in designing the LPF. Another practical design example will illustrate this approach.
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The Tuning Range

Actual measurement is carried out, with the frequency measured using a high bandwidth digital storage oscilloscope.
410
D1 is BB149A, a varactor manufactured by Phillips Semiconductor (Now NXP).
405 f
MHz
400
395
0.5
1 Vdc
1.5
2.5
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Volts
78
39
Phase Noise in Oscillator (1)

Since the oscillator output is periodic. In frequency domain we would expect a series of harmonics. In a practical oscillation system, the instantaneous frequency and magnitude of oscillation are not constant. These will fluctuate as a function of time. vosc (t ) = (Vo + mnoise (t )) cos(t + + noise (t )) These random fluctuations are noise, and in frequency domain the effect of the spectra will smear out.
t
Ideal oscillator output

t
fo
2fo
3fo
Smearing
Real oscillator output

fo
2fo
3fo
79

Mathematically, we can say that the instantaneous frequency and magnitude of oscillation are not constant. These will fluctuate as a function of time. As a result, the output in the frequency domain is smeared out.
v(t) T = 1/fo
Leesons expression
LPM 10 log
FkT A
1 8 QL
( )]
fo 2 f offset
t fo v(t) f Contains both phase and amplitude modulation of the sinusoidal waveform at frequency fo f
Large phase noise
t fo
Small phase noise

40

Typically the magnitude fluctuation is small (or can be minimized) due to the oscillator nonlinear limiting process under steady-state. Thus the smearing is largely attributed to phase variation and is known as Phase Noise. Phase noise is measured with respect to the signal level at various offset frequencies. Signal level vosc (t ) Vo cos(t + + noise (t )) Phase noise is measured in
v(t) - 90dBc/Hz t 100kHz f fo dBc/Hz @ foffset. dBc/Hz stands for dB down from the carrier (the c) in 1 Hz bandwidth. For example -90dBc/Hz @ 100kHz offset from a CW sine wave at 2.4GHz.
81
Assume amplitude limiting effect Of the oscillator reduces amplitude fluctuation

Reducing Phase Noise (1)

Requirement 1: The resonator network of an oscillator must have a high Q factor. This is an indication of low dissipation loss in the tuning network (See Chapter 3a impedance transformation network on Q factor).
Xtune Variation in Xtune due to environment causes small change in instantaneous frequency. Xtune
X1
Tuning Network with High Q f

f
X1 f
Tuning Network with Low Q

f
-X1
2|X1|
-X1 Ztune = Rtune +jXtune

2|X1|
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41

A Q factor in the tuning network of at least 20 is needed for medium performance oscillator circuits at UHF. For highly stable oscillator, Q factor of the tuning network must be in excess or 1000. We have looked at LC tuning networks, which can give Q factor of up to 40. Ceramic resonator can provide Q factor greater than 500, while piezoelectric crystal can provide Q factor > 10000. At microwave frequency, the LC tuning networks can be substituted with transmission line sections. See R. W. Rhea, Oscillator design & computer simulation, 2nd edition 1995, McGraw-Hill, or the book by R.E. Collin for more discussions on Q factor. Requirement 2: The power supply to the oscillator circuit should also be very stable to prevent unwanted amplitude modulation at the oscillators output.

Requirement 3: The voltage level of Vcontrol should be stable. Requirement 4: The circuit has to be properly shielded from electromagnetic interference from other modules. Requirement 5: Use low noise components in the construction of the oscillator, e.g. small resistance values, low-loss capacitors and inductors, low-loss PCB dielectric, use discrete components instead of integrated circuits.
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42
Example of Phase Noise from VCOs

Comparison of two VCO outputs on a spectrum analyzer*.
VCO output with high phase noise
VCO output with low phase noise
*The spectrum analyzer internal oscillator must of course has a phase noise of an order of magnitude lower than our VCO under test.
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More Materials
This short discussion cannot do justice to the material on phase noise. For instance the mathematical model of phase noise in oscillator and the famous Leesons equation is not shown here. You can find further discussion in [4], and some material for further readings on this topic: D. Schere, The art of phase noise measurement, Hewlett Packard RF & Microwave Measurement Symposium, 1985. T. Lee, A. Hajimiri, The design of low noise oscillators, Kluwer, 1999.
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43
More on Varactor
The varactor diode is basically a PN junction optimized for its linear junction capacitance. It is always operated in the reverse-biased mode to prevent nonlinearity, which generate harmonics.
As we increase the negative biasing voltage Vj , Cj decreases, hence the oscillation frequency increases. Cj The abrupt junction varactor has high Q, but low sensitivity (e.g. Cj varies little over large voltage change). The hyperabrupt junction varactor Cjo Forward biased has low Q, but higher sensitivity.
0
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Vj
Reverse biased Linear region
Vj
A Better Variable Capacitor Network

The back-to-back varactors are commonly employed in a VCO circuit, so that at low Vcontrol, when one of the diode is being affected by the AC voltage, the other is still being reverse biased. When a diode is forward biased, the PN junction capacitance becomes nonlinear. The reverse biased diode has smaller junction capacitance, and this dominates the overall capacitance of the back-to-back varactor network. This configuration helps to decrease the harmonic distortion. To suppress RF signals Vcontrol
Vcontrol Symbol for Varactor
88
To negative resistance amplifier
At any one time, at least one of the diode will be reverse biased. The junction capacitance of the reverse biased diode will dominate the overall capacitance of the network.
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Vcontrol
44
Example 5.1 VCO Design for Frequency Synthesizer

To design a low power VCO that works from 810 MHz to 910 MHz. Power supply = 3.0V. Output power (into 50 load) minimum -3.0 dBm.
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Example 5.1 Cont

Checking the d.c. biasing and AC simulation.
DC
DC DC1
S-PARAMETERS
S_Param SP1 Start=0.7 GHz Stop=1.0 GHz Step=1.0 MHz
V_DC SRC1 Vdc=3.3 V R RB R=33 kOhm
b82496c3120j000 LC param=SIMID 0603-C (12 nH +-5%)
100pF_NPO_0603 Cc2 pb_phl_BFR92A_19921214 Q1 4_7pF_NPO_0603 Term Cc1 Term1 Num=1 Z=50 Ohm 2_2pF_NPO_0603 C1 R RL R=100 Ohm
Z11
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3_3pF_NPO_0603 C2 R RE R=100 Ohm
90
45
Example 5.1 Cont

Checking the results real and imaginary portion of Z1 when output is terminated with ZL = 100 .
m1 freq=775.0MHz m1=-89.579
-40 -50 -60
m2 freq=809.0MHz m2=-84.412
imag(Z(1,1)) real(Z(1,1))
-70 -80 -90 -100 -110 -120 0.70 0.72 0.74 0.76 0.78 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00
m2 m1
freq, GHz
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Example 5.1 Cont

The resonator design.
PARAMETER SWEEP
ParamSweep Sweep1 SweepVar="Vcontrol" SimInstanceName[1]="SP1" SimInstanceName[2]= SimInstanceName[3]= SimInstanceName[4]= SimInstanceName[5]= SimInstanceName[6]= Start=0.0 Stop=3 Step=0.5
S-PARAMETERS
S_Param SP1 Start=0.7 GHz Stop=1.0 GHz Step=1.0 MHz
Var Eqn
VAR VAR1 Vcontrol=0.2
L L1 L=10.0 nH R= C C3 C=0.68 pF Term Term1 Num=1 Z=50 Ohm
Vvar V_DC SRC1 Vdc=Vcontrol V L L2 L=33.0 nH R= 100pF_NPO_0603 C2 BB833_SOD323 D1
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46
Example 5.1 Cont

The resonator reactance.
120
-X1 of the destabilized amplifier

m1 freq=882.0MHz m1=64.725 Vcontrol=0.000000 m1
100
-imag(VCO_ac..Z(1,1)) imag(Z(1,1))
80
60
40
Resonator reactance as a function of control voltage

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The theoretical tuning range
0 0.70 0.75 0.80 0.85 0.90 0.95 1.00
freq, GHz
Example 5.1 Cont

The complete schematic with the harmonic suppression filter.
TRANSIENT
Tran Tran1 StopT ime=1000.0 nsec MaxTimeStep=1.0 nsec DC DC1
DC
Low-pass filter
b82496c3120j000 L3 param=SIMID 0603-C (12 nH +-5%) 100pF_NPO_0603 Cc2 b82496c3150j000 L4 param=SIMID 0603-C (15 nH +-5%)
VtPWL Src_trigger V_T ran=pwl(time, 0ns,0V, 1ns,0.1V, 2ns,0V) V_DC SRC1 Vdc=3.3 V R RB R=33 kOhm
b82496c3100j000 L1 param=SIMID 0603-C (10 nH +-5%) 4_7pF_NPO_0603 C Cc1 C6 C=2.2 pb_phl_BFR92A_19921214 Q1 pF 2_7pF_NPO_0603 C8 0_47pF_NPO_0603 C9 R RL R=100 Ohm
b82496c3330j000 L2 param=SIMID 0603-C (33 nH +-5%) Vvar V_DC SRC2 Vdc=1.2 V 100pF_NPO_0603 C4 R R1 R=100 Ohm BB833_SOD323 D1
C C5 C=0.68 pF
C C7 C=3.3 pF
R RE R=100 Ohm
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47
Example 5.1 Cont

The prototype and the result captured from a spectrum analyzer (9 kHz to 3 GHz).
Fundamental -1.5 dBm
Harmonic VCO suppression filter

- 30 dBm
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Example 5.1 Cont

Examining the phase noise of the oscillator (of course the accuracy is limited by the stability of the spectrum analyzer used).
-0.42 dBm
Span = 500 kHz RBW = 300 Hz VBW = 300 Hz
300Hz April 2012 2006 by Fabian Kung Wai Lee 96
48
Example 5.1 Cont

VCO gain (ko) measurement setup:
Variable power supply
V_DC SRC1 Vdc=3.3 V R RB R=33 kOhm
b82496c3120j000 L3 param=SIMID 0603-C (12 nH +-5%) 100pF_NPO_0603 Cc2 b82496c3150j000 L4 param=SIMID 0603-C (15 nH +-5%) R Rattn R=50 Ohm Port Vout Num=2
b82496c3100j000 L1 param=SIMID 0603-C (10 nH +-5%) 4_7pF_NPO_0603 Cc1 C C5 C=0.68 pF C C6 C=2.2 pF pb_phl_BFR92A_19921214 Q1 2_7pF_NPO_0603 C8
Spectrum Analyzer
0_47pF_NPO_0603 C9
Vvar Port Vcontrol Num=1 R Rcontrol R=1000 Ohm BB833_SOD323 D1
C C7 C=3.3 pF
R RE R=100 Ohm
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Example 5.1 Cont

Measured results:
fVCO / MHz
950
900
850
800
ko 55 MHz = 40.74 MHz/Volt

1.35 Volt
750 0.0
April 2012
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Vcontrol/Volts
98
49

Lesson 9

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10 - RF Oscillators

2006 by Fabian Kung Wai Lee

2006 by Fabian Kung Wai Lee

2006 by Fabian Kung Wai Lee

1.0 Oscillation Concepts

2006 by Fabian Kung Wai Lee

2.0 Overview of Feedback Oscillators

2006 by Fabian Kung Wai Lee

Classical Positive Feedback Perspective on Oscillator (1)

Classical Positive Feedback Perspective on Oscillator (1)

Classical Positive Feedback Perspective on Oscillator (2)

E(s) -A(s) Inversion F(s)

Classical Positive Feedback Perspective on Oscillator (3)

If X3 represents inductor, then X1 and X2 should be capacitors. X2

2006 by Fabian Kung Wai Lee

Classical Feedback Oscillators

Hartley oscillator Clapp oscillator

2006 by Fabian Kung Wai Lee

Example of Tuned Feedback Oscillator (1)

2.0 1.5 1.0

V_DC SRC1 Vdc=3.3 V R RB1 R=10 kOhm

0.5 0.0 -0.5

VC C Cc2 C=0.01 uF pb_mot_2N3904_19921211 Q1 R RB2 R=10 kOhm R RE R=220 Ohm C CE C=0.01 uF

t E(s) -A(s) So(s)

Example of Tuned Feedback Oscillator (2)

VC C Cc2 C=0.1 uF pb_m ot_2N3904_19921211 Q1 VE R RE R=100 Ohm

R RB2 R=4.7 kOhm

2006 by Fabian Kung Wai Lee

Example of Tuned Feedback Oscillator (3)

A 16 MHz Transistor Common-Emitter Crystal Oscillator

VC C Cc2 C=0.1 uF pb_mot_2N3904_19921211 Q1 R RB2 R=10 kOhm R RE R=220 Ohm C CE C=0.1 uF

sx_stk_CX-1HG-SM_A_19930601 XTL1 Fres=16 MHz

2006 by Fabian Kung Wai Lee

Limitation of Feedback Oscillator

2006 by Fabian Kung Wai Lee

3.0 Negative Resistance Oscillators

2006 by Fabian Kung Wai Lee

2006 by Fabian Kung Wai Lee

Recap - Wave Propagation Stability Perspective (1)

Compare with equation (2.1a)

2006 by Fabian Kung Wai Lee

Similar mathematical form

Recap - Wave Propagation Stability Perspective (2)

2006 by Fabian Kung Wai Lee

Oscillation from Negative Resistance Perspective (1)

Destabilized Amp. and Load

2006 by Fabian Kung Wai Lee

Oscillation from Negative Resistance Perspective (2)

Using circuit theory the voltage at Port 1 can be written as:

Oscillation from Negative Resistance Perspective (3)

Oscillation from Negative Resistance Perspective (4)

Oscillation from Negative Resistance Perspective (5)

Complex pole pair

or impulse starts the exponentially growing sinusoid

Oscillation from Negative Resistance Perspective (6)

The steady-state oscillation frequency o corresponds to n,

Oscillation from Negative Resistance Perspective (7)

2006 by Fabian Kung Wai Lee

Illustration of Oscillation Start-Up and Steady-State

-0. 8 0 10 20 30 40 50 60 70 80 90 10 0 110 120

Summary of Oscillation Requirements Using Series Network

2006 by Fabian Kung Wai Lee

Summary of Oscillation Requirements Using Parallel Network