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Features
s Typical propagation delays Select to outputs (4 delays): 18 ns Select to output (5 delays): 28 ns Enable to output: 20 ns s Low power: 40 W quiescent supply power s Fanout of 10 LS-TTL devices s Input current maximum 1 A, typical 10 pA
Ordering Code:
Order Number MM74HC139M (Note 1) MM74HC139SJ MM74HC139MTC (Note 1) MM74HC139N Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Truth Table
Inputs Enable G H L L L L
H = HIGH Level L = LOW Level X = Don't Care
Outputs
Select B X L L H H A X L H L H Y0 H L H H H Y1 H H L H H Y2 H H H L H Y3 H H H H L
DS005311
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MM74HC139
Logic Diagram
(1 of 2)
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MM74HC139
0.5 to +7.0V 1.5 to VCC +1.5V 0.5 to VCC +0.5V 20 mA 25 mA 50 mA 65C to +150C
40
+85
Note 2: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 3: Unless otherwise specified all voltages are referenced to ground. Note 4: Power Dissipation temperature derating plastic N package: 12 mW/C from 65C to 85C.
DC Electrical Characteristics
Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output Voltage VIN = VIH or VIL |IOUT | 20 A
(Note 5)
VCC 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0 4.5 6.0 4.2 5.7 0 0 0 0.2 0.2 TA = 25C Typ 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.1 8.0 TA = 40 to 85C TA = 55 to 125C Guaranteed Limits 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1.0 80 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1.0 160 A A V V V V Units
Conditions
VIN = VIH or VIL |IOUT | 4.0 mA |IOUT | 5.2 mA VOL Maximum LOW Level Output Voltage VIN = VIH or VIL |IOUT | 20 A 2.0V 4.5V 6.0V VIN = VIH or VIL |IOUT | 4.0 mA |IOUT | 5.2 mA IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN = VCC or GND IOUT = 0 A 6.0V VIN = VCC or GND 4.5V 6.0V 6.0V 4.5V 6.0V
Note 5: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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MM74HC139
AC Electrical Characteristics
VCC = 5V, TA = 25C, CL = 15 pF, tr = tf = 6 ns Symbol tPHL, tPLH Parameter Maximum Propagation Delay, Binary Select to any Output 4 levels of delay tPHL, tPLH Maximum Propagation Delay, Binary Select to any Output 5 levels of delay tPHL, tPLH Maximum Propagation Delay, Enable to any Output 19 30 ns 28 38 ns Conditions Typ 18 Guaranteed Limit 30 Units ns
AC Electrical Characteristics
CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol Parameter Conditions (Note 6) VCC 2.0V 4.5V 6.0V (Note 7) 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V CIN CPD Maximum Input Capacitance Power Dissipation Capacitance (Note 8)
Note 6: 4 levels of delay are A to Y1, Y3 and B to Y2, Y3. Note 7: 5 levels of delay are A to Y0, Y2 and B to Y0, Y1. Note 8: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC.
TA = 40 to 85C TA = 55 to 125C Guaranteed Limits 219 44 38 275 55 47 219 44 38 95 19 16 10 254 51 44 320 64 54 254 51 44 110 22 19 10
Units
tPHL, tPLH Maximum Propagation Delay Binary Select to any Output 4 levels of delay tPHL, tPLH Maximum Propagation Delay Binary Select to any Output 5 levels of delay tPHL, tPLH Maximum Propagation Delay Enable to any Output tTLH, tTLH Maximum Output Rise and Fall Time
ns
ns
ns
ns pF pF
(Note 8)
75
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MM74HC139
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
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MM74HC139
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
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MM74HC139
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
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16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
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