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Hands-On RadiO

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Experiment #68 Phase Locked Loops, the Basics


voltage between its input terminals, the opamp output voltage changes and the external circuitry is configured to make that change reduce the difference, bringing the circuit back into balance. That kind of feedback loop uses a signals amplitude (voltage and current) instead of frequency and phase as does the PLL.

control voltage until the two frequencies are the same. Simple, no? Maybe we should slow down a little bit and look at each piece. The VCO is a special type of oscillator that has a frequency controlled by an applied voltage. The frequency of the VCO without any control signal applied is called the freerunning frequency, f0. Depending on the circuit design, the VCO may be designed so Background Loop Components that f0 occurs with zero dc voltage input and The phase locked loop (PLL) has its roots The PLL has three basic components, seen a bipolar control signal, or at some non-zero in receiver design. It was invented in 1932 in Figure 1 the phase detector, the loop filter dc voltage so the circuit can operate from a as a technique for stabilizing an oscillators and a voltage-controlled oscillator (VCO). The single power supply voltage. Next, you may be wondering why I used frequency.1 The PLL was then adapted for output from the phase detector (C in Figure 1) use in television receivers, synchronizing is a signal that contains the frequency and a mixer symbol for the phase detector. Its the vertical and horizontal sweep circuits to phase difference between the input signal and because the phase detector is just that a the incoming video signal. In the 1960s and VCO output. The loop filter creates the VCO type of mixer. Experiment #66 provided 70s, integrated circuit PLL chips became control voltage based on the difference signal. the equations describing a mixers output available and the technique soon became The VCO changes frequency in response to the products, but ignored differences in phase between the input signals. Taking even more widespread. phase into account, the mixing Lets start with the name product at the difference of the itself. Phase refers to the relative two input signal frequencies, phase difference between an infA and fB, is cos(2[fA fB] put signal and the loops internal t + ), with representing the oscillator. Locked means that difference in phase between the oscillators phase maintains the signals. If the two signals a constant relationship of that have the same frequency and of the input signal. This also the phase difference is constant, means the frequencies of the two then fA fB = 0, leaving cos (), signals are the same, otherwise Figure 1 The basic structure of a phase locked loop. The phase a dc voltage that makes a fine the phase difference would detector acts as a mixer, generating products at the sum and difference frequencies of its inputs. The filter extracts the dc VCO control signal. change. Loop comes from the component of the mixer output for the VCO to use as a control The high frequency of the feedback loop that controls the voltage. sum product at fA + fB is not internal oscillators frequency suitable as a VCO control voltto remain in sync with that of age and so must be removed. the input signal. Thus, a phase That is the job of the low-pass locked loop. loop filter to remove everyFeedback is key to the PLLs thing but the phase detectors function. Think back to the defA fB product, along with the scription of how an op-amp amphase information. Dependplifier circuit works in Handsing on the design of the phase On Radio Experiment #3. 2 detector and the nature of the Amplifying the difference in signals (sine, square, pulse), the loop filter may also need 1 www.uoguelph.ca/~antoon/ to convert short bursts of curgadgets/pll/pll.html. rent into a smoothly varying 2Hands-On Radio experiments voltage. Phase locked loops are found in many types of radio equipment. They can be used as modulators, demodulators, oscillators, synthesizers, clock signal recovery circuits and the list goes on. Are they mysterious and difficult to understand? Not really, once you get to know each piece and do a little experimentation.
are available online to ARRL members at www.arrl.org/tis/ info/HTML/Hands-On-Radio. The first 61 experiments are also available as ARRL HandsOn Radio Experiments from the ARRL at www.arrl.org/shop.

Figure 2 The four frequency ranges that define a PLLs behavior. Lock range (and hold range) shows how far the PLL frequency can track an input signal. Capture range (and pull-in range) shows how far from the free running frequency the VCO will move to lock onto an input signal.

PLL Operation
After the PLL is turned on with no input signal, the VCO will oscillate at the free-

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From September 2008 QST ARRL

signal and locks again both running frequency, f0, until an traces will be stable. This input signal is applied. The frequency, the upper limit of phase detector generates sum the PLL capture range, will and difference products, the be somewhat lower than the loop filter removes the sum upper lock range limit. Change product, and the VCO output the generator frequency to frequency begins to change. something below the lower Assuming the input and VCO limit of lock range you meafrequencies are not the same, sured previously. Slowly inthe output of the loop filter crease frequency until the (D in Figure 1) will be an inPLL captures the input signal creasing or decreasing voltage at the lower limit of capture depending on which signal has range. Total capture range is the higher frequency. the difference between these This changing voltage two frequencies. causes the VCO to respond Capture range depends on very quickly, reducing the the time constant of the loop difference between the VCO filter, determined by CF and a and input frequencies. Con3.6 k resistor connected insequently, the loop filters side the IC. The time constant output voltage is also reof the filter equals R C = Figure 3 The 565 integrated circuit PLL contains almost all of the duced, making smaller and circuitry necessary to build a PLL. Only a few discrete components 3.6 k 10 F = 36 ms. The smaller changes in the VCO are needed to set the VCO free-running frequency and loop filter larger the time constant, the frequency. Within a short time time constant. smaller the capture range be(typically a few milliseconds cause the loop doesnt respond for RF PLLs) the VCO frequency is equal to that of the input signal and below f0 are called the loops hold ranges. The quickly enough. Replace CF with smaller capacitors, down to 1 nF and see what hapthe loop is locked. Any change in either the lock range is not always centered on f0. pens to capture range as the loop reacts more PLL input or VCO frequencies is tracked by quickly. Leave the circuit assembled for next a change in the loop filter output, keeping the Building A PLL The venerable 565 PLL IC, a fixture in months follow-up experiments! two frequencies the same. This process of adjust and hold is called electronics for nearly 40 years, is still widely capture. The minimum and maximum input used. Start by downloading the LM565 Parts List Capacitor 0.1 F ceramic, quantity 3. frequencies to which the loop can move the datasheet from cache.national.com/ds/ Capacitor 0.022 F ceramic or film. VCO as it captures an input signal is called LM/LM565.pdf. Familiarize yourself with Capacitor 10 F, 25 V electrolytic. the capture range as shown in Figure 2. The the pin connections and browse some of the Phase locked loop IC NE565. segments of the capture range above and be- circuit examples. Potentiometer 10 k. Build the circuit shown in Figure 3. Youll low f0 are called the pull-in range. The pull-in Resistor 4.7 k, 14 W, quantity 3. need a bipolar power supply to do this exranges are not necessarily symmetrical. Parts hint the end of fishing season If the control signal is proportional to periment. Set the potentiometer to half-range, the cosine of the phase difference, it will be about 5 k. Without connecting any input is a great time to find bargains on tackle zero when the phase difference is 90 (cos signal, apply power and use an oscilloscope boxes. They make terrific parts and tool 90 = 0). It will be a maximum when the or frequency counter to measure the free- organizers! two signals are in phase (cos 0 = 1) or out running frequency at VCO out. It should be Recommended Reading of phase (cos 180 = 1). This defines the close to f0 = 1.2/4RTCT 1360 Hz. Many electronic experimenters have Set your function generator to output a range over which the PLL can keep the input and VCO frequencies locked together. As the sine wave at the measured value of f0. 0.5 to gotten their start in understanding PLLs by input frequency moves farther and farther 1 VP-P will be sufficient. Apply the sine wave reading the classic tutorial Motorola apfrom f0, the VCOs free-running frequency, to the PLLs input. Use a dual-channel oscillo- plication note AN535 Phase Locked Loop the loops control action will keep the VCO scope to monitor both the function generator Design Fundamentals. Its available at www. frequency the same as the input frequency, output and the VCO output. Use the function datasheetcatalog.org/datasheet/motorola/ but with a phase difference that gets closer generator output to trigger the scope. The AN535.pdf and would make a good addition to 0 or 180, depending on which direction sine waves on both channels should be stable to your technical library. (because they are locked in frequency) but the input frequency changes. Next Month If the input frequency has moved so far will be somewhat out of phase. This month you manipulated the PLL by Slowly reduce the generator output frethat the phase difference between it and the VCO frequency is either 0 or 180, any quency until the PLL loses lock seen as hand. Next month, we go live as we use a further change will cause the control signal one trace suddenly becoming unstable. That PLL to demodulate an FM signal. to move back toward its 90 value and the frequency is the lower limit of the PLLs lock VCO frequency away from the input signal. range. Return the generator frequency to f0 The loop is no longer locked and the input and then increase it until the PLL loses lock and VCO frequencies are no longer the same. again at the upper limit of the lock range. The range of input frequencies between Total lock range is the difference between the value at which the loop is locked with a these two frequencies. Slowly reduce the generator frequency phase difference of 0 and 180 is called the loops lock range. The lock range above and until the PLL suddenly captures the input
From September 2008 QST ARRL

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