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EVOLUTION OF MICROPROCESSOR
It is a semiconductor device and consist of several digital circuits. First 4-bit microprocessor 4004 was introduced by intel corporation in 1971. In next few year more advance (8-bit) microprocessor appeared. Intels 8080A and 8085A Zilogs Z80 Motorolas 6808 and 6809 National semiconductors NEC800. Intels 8086, 80186 and 80286. Zilogs Z8001 and Z8002. Motorolas 68000 and 68010. National semiconductors NS 16000. Digital equipments LSI-11, Texas instruments TMS 9900. Intels 80386 Motorolas MC 68020 and MC 68030. National semiconductors 16032 and 32032.

The third generation microprocessor were 16-bit.

Next is a 32-bit microprocessor.

8085 MICROPROCESSOR
The main feature of 8085 microprocessor are,
It is 40 pin microprocessor. Single +5V supply. 8-bit data bus. 16- bit address bus. Addressing capability is of 64KB. Operating frequency is 3 MHz. Instruction set contains 74 instructions. Five hardware interrupt. 8- bit ALU.

PIN DIAGRAM

GIT
INTERRUPT UNIT
SERIAL IO UNIT

GHARDA INSTITUTE OF TECHNOLOGY

A(8)

Z(8)

FR(8)

IR(8)

W(8) B(8)

X(8) C(8) E(8) L(8)

ALU (8)

ID

D(8) H(8)

PC(16) SP(16)

INCR / DCR (16)

TIMING & CONTROL UNIT

ADDRESS BUFFER

ADDRESS / DATA BUFFER

INTERRUPT UNIT: Interrupt means a request from external device to microprocessor to

perform its assign work. Interrupt is mainly categories into two parts,
1. 2. Hardware interrupt. Software interrupt.

Hardware interrupt: There are five hardware interrupt, 1. 2. 3. 4. 5. TRAP RST 7.5 RST 6.5 RST 5.5 INTR.

TRAP: It is a level edge sensitive signal. It is non- maskable vector interrupt. It has highest priority. Its ISR address is 0028H. The internal circuit associated with TRAP is as shown below.

RST 7.5: It is a edge sensitive signal. It is maskable vector interrupt. The priority of RST 7.5 is next to TRAP. Its ISR address is 003CH.

RST 6.5: It is a level sensitive signal. It is maskable vector interrupt. The priority of RST 6.5 is next to RST 7.5. Its ISR address is 0034H.

RST 5.5: It is a level sensitive signal. It is maskable vector interrupt. The priority of RST 5.5 is next to RST 6.5. Its ISR address is 002CH.

INTR: it is a lowest priority interrupt. It is a level sensitive signal. It is non-vector

interrupt. It cannot be mask separately. The only way of preventing this interrupt is to reset INTE FF. when INTR signal is received, the microprocessor can generate INTA pulse.

SERIAL IO UNIT: Using this unit microprocessor can in or out the data serially from or to external device. This unit contains two pins these are as follows,

SERIAL IO UNIT

SERIAL INPUT DATA ( SID ): This pin can be used to receive the data serially from external device. SERIAL OUTPUT DATA ( SOD ): -

This pin can be used to transmit the data serially to external device.

GENERAL PURPOSE REGISTER: Contains six 8-bit general purpose register B, C, D, E, H & L. Each register can store a maximum 8-bit data. For storing data more than 8-bit these registers can be used in pair. There are three 16-bit register pair BC, DE, HL

TEMPORARY REGISTER: Contains THREE 8-bit temporary registers. Each register can store a maximum 8-bit data. These registers are used for temporary storage of data for some instructions. There registers are only used by microprocessor for internal operation, they are not available for user.

ACCUMULATOR: It is a 8-bit register so it can store a maximum 8-bit data. It is a special register for arithmetical & Logical operation. When microprocessor can perform any arithmetical or Logical operation, the first

input is always taken from accumulator.

After performing arithmetical & Logical operation result is also stored in accumulator

ARITHMATICAL & LOGICAL UNIT: It is a 8-bit register so it can perform maximum 8-bit operation. It is a special register for performing arithmetical & Logical operation. As ALU is of 8-bit, so microprocessor 8085 is also called as 8-bit microprocessor.

INSTRUCTION REGISTER: It is a 8-bit register so it can store 8-bit data. The instruction to be executed is fetched from the memory and loaded into the instruction register. It is only for storing operational code of instruction and not available for user.

INSTRUCTION DECODER: This block decodes the instruction. Generates necessary signals for execution of instruction.

FLAG REGISTER: It is a 8-bit register. This register is used to indicate status of result. This register indicates different five status, and three flip flop is unused. The different five flags are as follows, Sign flag. Zero flag Auxiliary carry flag. Parity flag. Carry flag.

8-bit format of flag register is as follows,

SIGN FLAG : - ( S )
This flag indicates sign of result. If sign of result is positive then this flag is reset so S = 0. If sign of result is negative then this flag is set so S = 1.

ZERO FLAG : - ( Z )
This flag indicates whether result is zero or non-zero. If result is non-zero then this flag is reset so Z = 0. If sign result is zero then this flag is set so Z = 1.

AUXILLARY CARRY FLAG : - ( Ac )

After adding 4-LSB of two 8-bit number carry is generated this carry is directly stored into auxiliary carry flag. If carry is not generated then Ac = 0. If carry is generated then Ac = 1.

PARITY FLAG : - ( P )
Parity means number of 1s bit present in 8-bit result. If number of 1s bit present in 8-bit result is even then P = 0.( even parity ) If number of 1s bit present in 8-bit result is odd then P = 0.( odd parity )

CARRY FLAG : - ( Cy )
After adding two 8-bit number carry is generated this carry is directly stored into carry flag. If carry is not generated then Cy = 0. If carry is generated then Cy = 1.