UNIT 2

ADDITION & SUBTRACTION OF SIGNED NUMBERS

xi
0 0 0

Yi
0 0 1

carry ci
0 1 0

sum si
0 1 1

carry-out ci+1
0 0 0

0
1 1 1 1

1
0 0 1 1

1
0 1 0 1

0
1 0 0 1

1
0 1 1 1

Logic for single stage

Logic for single stage

n-bit ripple carry adder

A cascaded connection of n full adder blocks can be used to add n-bit numbers .since carry propagate or ripple through the adder it is called an n-bit ripple carry adder.

n-bit ripple carry adder

DESIGN OF FAST ADDERS

DESIGN OF FAST ADDERS

Two approaches to reduce delay in adders
1st approach-Fastest possible electronic technology in implementing ripple carry logic design 2nd approach-Use an augmented logic gate network structure that is larger

MULTIPLICATION OF POSITIVE NUMBERS

 Product of n digit numbers can be accommodated in 2n digits Product of 4bit numbers will fit into 8bits Refer pg-378 4th para alone for register configuration diagram

Manual multiplication
1 1 0 1 x multiplicand M 1 0 1 1 multiplier Q 1101 1101 0000 1101 1 0 0 0 1 1 1 1 Product P

REGISTER CONFIGURATION

SIGNED OPERAND MULTIPLICATION

BOOTH ALGORITHM

BOOTH MULTIPLIER TABLE

FAST MULTIPLICATION
1.BIT PAIR RECODING OF MULTIPLIER 2.CARRY SAVE ADDITION OF SUMMANDS

 1.BIT PAIR RECODING OF MULTIPLIER 2.CARRY SAVE ADDITION OF SUMMANDS

Have been used in various ways by the high performance processor to reduce the time needed to perform multiplication

BIT PAIR RECODING OF MULTIPLIER

 A technique called Bit pair recoding halves the maximum number of summands It is derived directly from booth algorithm

CARRY SAVE ADDITION OF SUMMANDS

 Multiplication requires the addition of several summands A technique called carry save addition(CSA) speeds up the addition process Instead of letting the carries ripples along the rows, they can be saved and introduced into the next row ,at the correct weighted position

 Delay through carry save array is somewhat less than delay through ripple carry array A more significant reduction in delay can be achieved as follows
Consider addition of many summands,as required in multiplication of longer operand Group the summands in three and perform carry save addition on each of these group

 In parallel to generate a set of S and C

Next we group all of the S and C vectors into three and perform carry save addition on them,generate further set of S and C

- We continue this process until there are only two vectors remaining

INTEGER DIVISION 1.Restoring Division 1. 2.Non Restoring Division

Restoring Division

Non Restoring Division