Chapter 3(ii)

BJT (DC analysis)

definitions
Biasing refers to the DC voltages applied to a transistor in
order to turn it on so that it can amplify the AC signal.
The DC input establishes an operating or quiescent point called the
Q-point.

Active or Linear Region Operation

BaseEmitter junction is forward biased
BaseCollector junction is reverse biased
Cutoff Region Operation
BaseEmitter junction is reverse biased
Saturation Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is forward biased

DC biasing circuits

Fixed-bias circuit
Emitter-stabilized bias circuit
Voltage divider bias circuit
DC bias with voltage feedback

Fixed-bias circuit

DC analysis
Base-Emitter Loop

From Kirchhoffs voltage law:

+VCC IBRB VBE = 0

Collector-Emitter Loop

The collector current is given by:

I C I B

Solving for the base current:

IB

VC C VBE
RB

From Kirchhoffs voltage law:

VCE VCC I C R C

Load Line for Fixed-bias circuit

The end points of the load line
are:

ICsat

VCC
IC
RC
VCE 0V

VCEcutoff

VCE VCC
I C 0 mA
The Q-point is the particular operating point:

where the value of RB sets the value of IB

where IB and the load line intersect
that sets the values of VCE and IC

Circuit Values Affect the Q-Point

Increasing level of IB
Increasing level of RC

Decreasing
value of VCC

Emitter-Stabilized Bias Circuit

Adding a resistor (RE) to the emitter circuit stabilizes the
bias circuit.

DC analysis
Base-Emitter Loop

From Kirchhoffs voltage law :

VCC - I E R E - VBE - I E R E 0
Since IE = (b + 1)IB:

VCC - I B R B - ( 1)I B R E 0
Solving for IB:

IB

VCC - VBE
R B ( 1)R E

Collector-Emitter Loop

From Kirchhoffs voltage law :

I E R E VCE I C R C VCC 0
Since IE IC:

VCE VCC I C (R C R E )
Also:

VE I E R E
VC VCE VE VCC - I C R C
VB VCC I R R B VBE VE

Improved Biased Stability

Adding RE to the emitter improves the stability of a
transistor.
Stability refers to a bias circuit in which the
currents and voltages will remain fairly
constant for a wide range of temperatures and
transistor Beta () values.

Load Line for Emitter-bias circuit

The end points of the load line
are:

ICsat

VCC
IC
RC RE
VCE 0V

VCEcutoff

VCE VCC
I C 0 mA

Voltage Divider Bias

This is a very stable
bias circuit.
The currents and
voltages are almost
independent of
variations in .
There are two ways
of analyzing the
voltage divider bias
circuit :1. Exact analysis
2. Approximate
analysis

Exact Analysis

RTh R1 R2

ETh VR2

IB

R2VCC
R1 R2

ETh VBE
RTh 1RE

VCE VCC I C RC RE

Approximate analysis
Where IB << I1 and I2 and I1 I2 :

VB

R 2 VCC
R1 R 2

Where RE > 10R2:

IE

VE
RE

VE VB VBE
From Kirchhoffs voltage law:

VCE VCC - I C R C - I E R E
IE IC
VCE V CC-IC (RC R E )

DC Bias with Voltage Feedback

Another way to
improve the
stability of a bias
circuit is to add a
feedback path from
collector to base.
In this bias circuit
the Q-point is only
slightly dependent
on the transistor
beta, .

Base-Emitter loop
From Kirchhoffs voltage law:

VCC I C R C I B R B VBE I E R E 0
Where IB << IC:

I C I C I B I C
Knowing IC = IB and IE IC, the
loop equation becomes:

VCC I B R C I B R B VBE I B R E 0
Solving for IB:

IB

VCC VBE
R B (R C R E )

Collector-emitter loop
Applying Kirchoffs voltage law:
IERE + VCE + ICRC VCC = 0
Since IC IC and IC = IB:
IC(RC + RE) + VCE VCC =0
Solving for VCE:
VCE = VCC IC(RC + RE)