Field Programmable Gate

Array (FPGA)
A brief Introduction with AND gate example

By:
Engr. Khawaja Arsalan
Habib

Overview of this
presentation

Introduction to presenter
What is FPGA?

Why to use FPGA technology

Architecture of FPGA
Hardware description language
Example of AND gate implemented in FPGA
Conclusion
Comments and Suggestions

Introduction to presenter
BSc. Electrical Engineering (Communication)
International University, Islamabad

from

Riphah

Designed and implemented an Intelligent Entry point in final year

project
MSc. In Electronics focused on Embedded Intelligent Systems from
University of Hertfordshire, United Kingdom
MSc. Project was Privacy Protection by Face de-identification
Did research work on Face de-identification using Neural Networks
Areas of special interest are Embedded system programming,
Digital Image Processing

What is FPGA
Regular Structure of Logic Cells
Basic FPGA building blocks are:
Logic Cells
I/O Logic Cells
Interconnecting paths
Programming switches

Why to use FPGA technology

Application Specific
Integrated
Circuits (ASIC)
Customized during
fabrication
Specific minimum
quantity order
Application specific
Very high non- recurring
cost

[1]

FPGA
Re-programmability (Low
Cost)
Optimized Design Tools
High Performance
System on Chip
Application areas are:

Communications
Wireless Systems
Computers
Video Compression
Systems

Architecture of FPGA

[2]

IOB: Input/ Output Block

DLL: Delay locked loop
Clock Management Unit

CLB: Configurable Logic Blocks

Storage Elements: D-Flip Flop latches
Clock enable

BRAMs: Block Select RAM

Fully synchronous dual-ported 4096-bit RA

-Stores address, data and write-control sig
on inputs

VersaRing: I/O Interface routing resour

The VersaBlock provides local routing
resources - high-speed connection
Figure: Xilinx Vertex Series FPGA

Hardware description language (HDL)

[3]

Verilog in USA and VHDL in European markets

Independent, standard language
Translated automatically
Netlist is a standard representation
Place and route (PAR) tools
Each FPGA vendor has its own PAR tools

Hardware description language (HDL)

[3]

Example of AND gate implemented in

FPGA [3]
VHDL constructs the design unit
Design Units

Entity

Defines the names

Architecture

Describes a particular
implementation

Package
Declaration

Allow a convenient
way to define and
group procedures

Package Body

Contains the
implementation of the
functionality

Conclusion
Wider applications
Simple programming tools
Ample range of solutions by different
vendors
Higher unit cost

References
[1] Hou, B. FPGA Architecture, lecture notes Advanced
Reconfigurable Systems and Applications at University of
Hertfordshire, United Kingdom in October 2011.
[2] Xilinx. (2003).Xilinx Vertex Series FPGA.Available:
http://homepages.cae.wisc.edu/~ece554/website/Lectures/
Xilinx_Vertex_Tech_s03.pdf. Last accessed 28/3/2013
[3] Bensaali, F. Introduction to VHDL, lecture notes Advanced
Reconfigurable Systems and Applications at University of
Hertfordshire, United Kingdom in October 2011.

Thanks for listening

Xilinx Vertex Series Family Members

Vertex Input /Output Block

2 Slice Vertex CLB

Block SelectRAM

Vertex Local Routing