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Von Neumann

Architecture and
Basic Gates
CP213 - Computer Organization with
Assembly Language

UNIT EXPECTED
OUTCOMES (UEO)

Evaluate the Von Neumann Architecture


Identify the importance of basic logics
and its application

John von Neumann

Was
a
Hungarian
American
mathematician
who
made
major
contributions to a vast range of fields,
including set theory, functional analysis,
quantum mechanics, ergodic theory,
continuous geometry, economics and
game
theory,
computer
science,
numerical analysis, hydrodynamics, and
statics, and statics, as well as many
mathematical theories.

Von Neumann
Architecture

Is a design model
for stored
program digital
computer that uses
a processing unit.

Todays stored-program computers have the


following characteristics:

Three hardware systems:

A central processing unit (CPU)


A main memory system
An I/O system

The capacity to carry out sequential


instruction processing.
A single data path between the CPU and
main memory.

This single path is known as the von


Neumann bottleneck.

Central Processing Unit (CPU)


An electronic circuit that can execute
computer programs.
Control Unit (CU)
Controls the inside processor which turn
the rest of the PC
Brain within the brain
Circuitry that controls the flow of
information through the processor, and
coordinates the activities of the other
units within.

A Finite State Machine

Control Processing Cycles

States
Inputs/Transitions/Outputs
Instruction States (fetch instruction, decode,
execute)
Data States (fetch, store)

Instructions, Addresses, and ALU result


flags are its inputs
Control Signals are its outputs

Arithmetic Logic Circuits (ALU)


Part of the CPU where arithmetic and logic
operations are performed.
It contains registers and / or accumulator for
calculators and intermediate results.

Accumulator

Special storage register associated with the arithmetic


unit for storing the results of the steps in a calculation or
data transfer.

Implements data load / store, basic arithmetic


operations, logic operation and bit
manipulations.

Input / Output (I/O)

Basic I/O allows data and control flags to be


passed

From external devices to registers


From registers to external devices

Direct Memory Access (DMA)

Passes blocks of data from memory directly to


external devices and from external devices directly
to memory

Memory

Part of computer that holds data and


instructions for processing. The memory
associated with CPU is called primary
storage, primary memory, main storage,
internal storage and main memory.

The Von Neumann Model


This is a general
depiction of a von
Neumann system:
These computers
employ a fetchdecode-execute
cycle to run
programs as
follows . . .

11

The Von Neumann Model


The control unit fetches the next instruction from
memory using the program counter to determine
where the instruction is located.

12

The Von Neumann Model


The instruction is decoded into a language that the
ALU can understand.

13

The Von Neumann Model


Any data operands required to execute the
instruction are fetched from memory and placed into
registers within the CPU.

14

How VNA built?

Implemented via logic gates combined


into digital building blocks on the
Boolean Logic.

Basic Digital Building


Blocks

Logic Gates
Bit Storage flip flops
Registers (Collections of flip flops)
Buses
Address Selection Logic
Synchronizing via System Clock

Logic Gates

Electronic device that operates on a set


of (binary) inputs to produce a binary
output.

AND GATE

OR GATE

NOT GATE / INVERTER

NAND GATE

NOR GATE

FLIP FLOP

storage elements employed in clocked


sequential circuits.
A flip -flops is a binary cell capable of
storing one bit of information. It has two
outputs, one for the normal value and
one for the complement value of the bit
stored in it.

SR Flip-Flops

The design of such a flip flop includes two


inputs, called the SET [S] and RESET [R].
There are also two outputs, Q and Q.

Bus

Memory bus is addresses, data, and


control flags for memory accesses.
Memory

memory bus

Control Unit

ALU

I/o Bus
I/O Devices

Memory Bus Structure


Control
Flags

Addres
s Bus

Data
Bus

Fetch / Store / Address Decode Logic

Memory Locations

Text Book

Computer System Organization with


Assembly Language

By Teodoro F. RevanoJr

Surname, FN MI. Date:


Course/Section:
Test 1
Questions will be dictated TWICE ONLY
Write your answers on your Bond Paper
Write ELIGIBLY.
No ERASURES
Draw lines on blank numbers (no answers)
No ERASURES. ERASURE means wrong
FRIXION PEN not allowed
WRONG Spelling WRONG.

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