A Project

on
DESIGN OF SWITCHED INVERTER
SCHEME FLASH ADC FOR LOW
POWER AND HIGH SPEED
APPLICATIONS
GUIDE
Prof . SUJATHA HIREMATH

-VIJETH S ANCHATGERI

OVERVIEW
Need for Flash ADC

Flash ADC
SIS Flash ADC
SIS Comparator
Digital Encoder
ADC comparison results
Conclusion

Need for ADC

Every signal we come across in real word is Analog
Processing of signals in analog domain is complex,
time consuming and expensive
We need ADC to process signals in Digital domain
Bridges gap between analog physical world and
digital logic world
Rapid growth in communications and signal
processing systems
Key component in SOC design and Modern
electronics

Why Flash ADC ??

FLASH - Very Fast

High speed Applications
Real time applications need conversion in Real time
High data conversion rate [Audio, video signal
processing]
Low power consumption [Battery operated devices]
Higher Resolution
Small chip area

Flash ADC Traditional

Features of conventional Flash ADC

2^N-1 no of Analog comparators
2^N-1 no of Resistors for N bit resolution
Resistor ladder network generates reference
voltage for each level
Less Accuracy due to use of resistors
High gain for Analog comparators
Low resistance values to drive large bais
current for comparators

Limitations of conventional Flash ADC

Resistor ladder network, consumes
Large chip area
More power consumption
Less accuracy

Analog Comparator requires

High DC bais current
High power consumption for higher operating speed
Charge injection errors

Switched Inverter Scheme (SIS) Flash ADC

SIS Comparator

 SIS ADC consists of cascaded cmos inverters as the

comparators
Cascaded cmos inverters act as voltage comparator
SIS Comparators generate the reference voltage
internally by varying the size of each NMOS and
PMOS transistors
Each of the transistors in SIS comparators are
designed for different Switching voltages
Each comparators are arranged according to their
switching voltage
Switching voltage for each inverter is designed by
varying width of both NMOS and PMOS transistors

 Switching voltage is calculated by equation

VDD Vtp Vtn

Vth

Kn

Kp

Wn
Kn Kn '

Wp
Wp
Kp Kp '
Lp

Kn
Kp

 Supply voltage Vdd , Threashold voltages Vtp, and

Vtn are constant, Hence the Switching voltage
depends only on Transistor size
For LSB bit [Wn/Wp] ratio should be small
For MSB bit [Wn/p] ratio should be Large
All inputs of cmos inverters are tied together to detect
the analog input signal
When the analog input signal arrives at particular
threshold voltage then output state changes
Analog input signal is quantized by inverters of
varying sizes arranged according to switching voltage

Advantages of SIS over Analog comparator

Eliminates Resistor ladder network
Faster voltage comparison speed
Simple voltage comparison circuit
Low power dissipation
Small chip area

Switching Voltages for different inverters

Digital Encoder
Multiplexer
XOR gate Encoder
The Equations for Encoding
B3 A8
B 2 A4 A8 A12
B1 B 2 A2 A6 A10 A14
B0 B1 A1 A3 A5 A7 A9 A11 A13 A15

ADC Comparison Results

FEATURES

4 BIT ADC
4 BIT ADC
3 BIT ADC
(XOR ENCODER) (MUX ENCODER) (MUX ENCODER)

POWER SUPPLY

3.3V

3.3V

1.8V

INPUT SIGNAL
RANGE

0.45V-2.2V

0.45V-2.2V

0.45V-1.3V

TRANSISTOR
COUNT

144

126

52

DYNAMIC
POWER

10.88mW

9.63mW

0.43mW

STATIC POWER

0.048uW

.046uW

0.011uW

FIGURE OF
MERIT (FOM)

1.56

1.21

0.022

DELAY

28.33nS

23.3nS

24.3nS

Conclusion
A 4-bit and 3- bit SIS Flash ADC is Designed using
different encoding Techniques in 180nm Technology in
cadence using spectre as simulator
Analog input signal is quantized by cmos inverters by
varying the transistor sizes
SIS Comparators generate the reference voltage
internally
Eliminates the Resistor ladder network
Consumes small silicon area, low power and High data
conversion rate hence used in High speed applications

THANK YOU!!