Lecture Notes

Gate Turn-off Thyristors (GTOS)

OUTLINE

• GTO construction and I-V characteristics.

• Physical operation of GTOs.
• Switching behavior of GTOS

Copyright © by John Wiley & Sons 2003 GTOs - 1

 GTO (Gate Turn-off Thyristor) Construction
gate
metallization cathode
• Unique features of the GTO. metallization
copper cathode
• Highly interdigitated gate- contact plate
cathode structure (faster
switching)

• Etched cathode islands

(simplify electrical contacts)

• Anode shorts (speed up

turn-off) N+ N+

P
• GTO has no reverse blocking
capability because of anode N-
+
shorts P N+ P+ N+ P+

• Otherwise i-v characteristic the anode J J J

same as for standard SCR shorts
anode 3 1 2
anode

GTO circuit symbol

gate
cathode

Copyright © by John Wiley & Sons 2003 GTOs - 2

 GTO Turn-off Gain
• Large turn-off gain requiresα2 ≈ 1,
I

A α1 << 1

• Make α1 small by
Q

1. Wide 1n region (base 1) -of

alsoQneeded
I'

Q
G (
for large blocking voltage
2

2. Short lifetime 1 region

in n to remove ex
carriers rapidly 1 can so
turnQoff

• Turn off GTO by pulling one or both of theBJTs out • Short lifetime causes higher -on-state losse
of saturation and into active region.
• Anode shorts helps resolve lifetim
delimma
• Force Q2 active by using negative base current G
I ’ to 1. Reduce lifetime only moderately to keep
IC2 on-state losses reasonable
make IB2 <
β2 2. N + anode regions provide a sink
excess holes - reduces turn-off time
• IB2 =α1 A
I - GI' ;C2 = I (1α1
- )A I
• Make α2 ≈ unity by making p2 layer
(1 - 
α1) I relatively thin and 2doping regionin n
A   (1 - 
α1) (1 - 
α2) I
A 
I - GI'<
• α1 A = heavily (same basic steps used in making
β2 α2
beta large BJTs).
in
IA   α2
• I'
G < ; βoff = = -turn-off gain
• Use highly
interdigitated gate-cathode
βoff (1 - 
α1 - 
α2)
geometry to minimize cathode current
crowding and di/dt .limitations.
Copyright © by John Wiley & Sons 2003 GTOs - 3
 Maximum Controllable Anode Current
K

G + G
N

• Large negative gate current creates

shrinking lateral voltage drops which must be
plasma kept smaller than breakdown voltage
of J3.
P
• If J3 breaks down, it will happen at
N
gate-cathode periphery and all gate
current will flow there and not sweep
K out any excess carriers as required to
G
turn-off GTO.
+
N
• Thus keep gate current less than
IG,max and so anode current restricted
IG,max
P
by IA <
βoff

Copyright © by John Wiley & Sons 2003 GTOs - 4

 GTO Step-down Converter

• GTO used in medium-to-high power applications

I
where electrical stresses are large and where other D o
solid state devices used with GTOs are slow e.g. free- f
wheeling diode D F.
+

• GTO almost always used with turn-on and turn-off

snubbers. V
d R
s
1. Turn-on snubber to limit overcurrent from D F
reverse recovery.
D
L s
2. Turn-off snubber to limit rate-of-rise of voltage - σ
to avoid retriggering the GTO into the on-state.
C
s

• Hence should describe transient behavior of GTO in

circuit with snubbers.

Copyright © by John Wiley & Sons 2003 GTOs - 5

 GTO Turn-on Waveforms

IG • GTO turn on essentially the same as for a

iG standard thyristor
M t
I "backporch" • Large I GM and large rate-of-rise insure all
td GT
current cathode islands turn on together and have
good current sharing.
i
A
tw • Backporch current I GT needed to insure all
t cathode islands stay in conduction during
1 entire on-time interval.

v • Anode current overshoot caused by free-

A wheeling diode reverse recovery current.
K
t
• Anode-cathode voltage drops precipitiously
v
GK because of turn-on snubber
t

Copyright © by John Wiley & Sons 2003 GTOs - 6

 GTO Turn-off Waveforms
iG
• ts interval
t Time required to remove sufficient stored charge to
IG approximate
bring BJTs into active region and break latch condition
T waveform
for analysis
• tfi interval
purposes 1. Anode current falls rapidly as load current
t tail commutates to turn-offsnubber capacitor
Io 2. Rapid rise in anode-cathode voltage due to stray
i
inductance in turn-offsnubber circuit
A t
• tw2 interval
t
fi 1. Junction J3 goes into avalanche breakdown because
ts V
dv
<
dv d of inductance in trigger circuit. Permits negative gate
tg
dt dt
max current to continuing flowing and sweeping out
charge from p2 layer.
q
2. Reduction in gate current with time means rate of
v anode current commutation tosnubber capacitor
A t
K slows. Start of anode current tail.
approximate waveform
for analysis purposes
• ttail interval
v
G 1. Junction J3 blocking, so anode current = negative
V t
K tw GG gate current. Long tailing time requiredto remove
2 - remaining stored charge.
2. Anode-cathode voltage growth governed by turn-off
snubber.
3. Most power dissipation occurs during tailing time.
Copyright © by John Wiley & Sons 2003 GTOs - 7