Computer Architecture and Microprocessor

Computer
Architecture
and
Microprocessor
1
Computer Architecture
& Microprocessor
Session I
 Number System
 Conversions
 Binary Operations
 Code
 Logic Gates
 Boolean Algebra
 Registers & Counters
 Computer Languages
2
& Microprocessor
Number System
Systematic representation of data in Numerical Format
 Decimal Number System  0 to 9
 Binary Number System  0 and 1
 Octal Number System  0 to 7
 Hexa Decimal Number System  0 to 9 and A to F
3
& Microprocessor
Decimal Number System
 Uses digits from 0 to 9.
 Has a base of 10
 Value of digit corresponds to its position in the number
number X (base)position-1
 Example :
49510 , 8410
4
& Microprocessor
Binary Number System
 Computer uses the Binary Number System
 Consists of numbers 0 and 1
 Bit (Binary digit)
 Byte (8 - bits)
 Example:
10102 , 11102
5
& Microprocessor
Octal Number System
 Uses the digits from 0 to 7.
 Has a base of 8
 can be represented by a group of 3 bits
 Example:
1238 , 4358
6
& Microprocessor
Hexa Decimal Number System
 Uses the digits from 0 to 15.
 Numbers from 10 to 15 represented by alphabets A through F
 Has a base of 16
 Can be represented by a group of 4 bits.
 Example:
B3A116 , 98C16
7
Number System Table & Microprocessor
Decimal Binary Octal Number Hexa Decimal

Number Number System Number
System System System
0 0000 0 0
1 0001 1 1
2 0010 2 2
3 0011 3 3
4 0100 4 4
5 0101 5 5
6 0110 6 6
7 0111 7 7
8 1000 10 8
9 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
8
& Microprocessor
Conversion of decimal Number to Hexadecimal Number
 To convert, divide the decimal number by 16 successively
Example
To convert 540 to decimal
16 540
16 33 -12
2-1
The decimal equivalent of 54010 = 21C16
9
& Microprocessor
Conversion from Hexadecimal to Decimal
 Multiply the digits of the number by the powers of 16 and add
Example
 To convert 21C
16 to its decimal equivalent
2 1 C
C X160 = 12 X 1 = 12
1 X161 = 1 X 16 = 16
2 X162 = 2 X 256= 512
540
10
& Microprocessor
Conversion of Hexadecimal to Binary Number
 The binary equivalent of each digit is used
Example
 To convert 5B16 to binary equivalent:

5 B
010110112
 To convert B316 to binary equivalent:

B 3
101100112
11
& Microprocessor
Conversion of Binary to Decimal Number
 Sum of product of each digit with 2 raised to the power

of positional value
Example:
To find the decimal equivalent of 10112 :
12
& Microprocessor
Conversion from Octal to Decimal
 Multiply the digits of the number by the powers of 8 and add
Example
 To convert 215 to its decimal equivalent
8
2 1 5
5 X 80 = 5 X 1 = 5
1 X 81 = 1 X 8 = 8
2 X 82 = 2 X 64= 128
141
13
& Microprocessor
9’s Complement
 Difference of each digit of a number from 9
Example:
 To find 9’s complement of 54 :
9 9
5 4
4 5
14
& Microprocessor
10’s Complement
 Equivalent to the negative of a number
 Obtained by adding 1 to the 9’s complement of a number
Example:
 To find 10’s complement of 54

= 9’s complement of 54 + 1
= 45 + 1
= 46
15
& Microprocessor
1’s Complement of binary number
 Similar to 9’s complement of decimal number
 Obtained by subtracting each digit from 1
Example
 To find 1’s complement of 101
1 1 1
1 0 1
0 1 0
16
& Microprocessor
2’s complement of a binary number
 Equivalent to 10’s complement of a decimal number
 Represents the negative equivalent of that number
Example
 To find the 2’s complement of 1010

= 1’s complement of 1010 + 1
= 0101 + 1
= 0110
17
& Microprocessor
Binary Subtraction
 To subtract 1010 from 1100
 Find 2’s complement of 1010

Number : 1010
1’s complement : 0101
2’s complement : 0110
 Add 2’s complement of 1010 with 1100

1100
0110
0010
18
& Microprocessor
BCD
 Each digit is represented by four bits

Decimal Number BCD Decimal Number BCD
0 0000 8 00001000
1 0001 9 00001001
2 0010 10 00010000
3 0011 11 00010001
4 0100 12 00010010
5 0101 13 00010011
6 0110 14 00010100
7 0111 15 00010101
19
& Microprocessor
Gray Code
 Only one bit changes for each consecutive numbers
Decimal Number Gray Code Decimal Number Gray Code

0 0000 8 1100
1 0001 9 1101
2 0011 10 1111
3 0010 11 1110
4 0110 12 1010
5 0111 13 1011
6 0101 14 1001
7 0100 15 1000
20
& Microprocessor
ASCII Codes
 American Standard Code for Information Interchange
 7 bit code
 Represents upto 128 characters
 First 3 bits-zone bits
 Second 4 bits-numeric bits
21
& Microprocessor
ASCII Codes
ASCII Code Character ASCII Code Character
00 NUL 11 DC1 (X-on)
01 SOH 12 DC2 (Tape)
02 STX 13 DC3 (X-off)
03 ETX 14 DC4
04 EOT 15 NAK
05 ENQ 16 SYN
06 ACK 17 ETB
07 BEL 18 CAN
08 BS 19 EM
09 HT 1A SUB
0A LF 1B ESC
0B VT 1C FS
0C FF 1D GS
0D CR 1E RS
0E S1 1F US
0F S0 20 SP
22
10 DLE 21 !
& Microprocessor
ASCII Code
ASCII Code Character ASCII Code Character
22 “ 32 2
23 # 33 3
24 $ 34 4
25 % 35 5
26 & 36 6
27 ‘ 37 7
28 ( 38 8
29 ) 39 9
2A * 3A :
2B + 3B ;
2C , 3C <
2D - 3D =
2E . 3E >
2F / 3F ?
30 0 40 @
31 1 41 A 23
& Microprocessor
ASCII Code Character ASCII Characters
42 B 56 V
43 C 57 W
44 D 58 X
45 E 59 Y
46 F 5A Z
47 G 5B [
48 H 5C \
49 I 5D ]
4A J 5E ^()
4B K 5F -()
4C L 61 a
4D M 62 b
4E N 63 c
4F O 64 d
50 P 65 e
51 Q 66 f
52 R 67 g
53 S 69 h
54 T 6A i
24
55 U 6B j
& Microprocessor
ASCII Code Character
6B k
6C l
6D m
6E n
6F o
70 p
71 q
72 r
73 s
74 t
75 u
76 v
77 w
78 x
79 y
7A z
7B {
7C |
7D }
7E ~
25
7F DEL
& Microprocessor
ASCII -8 Code
 Uses 8 bit code
 Represents upto 256 characters
 First 4 bits-zone bits
 Second 4 bits-numeric bits
26
& Microprocessor
Logic Gates
NOT gate or Inverter
 output is opposite of input
I/P O/P
 Truth Table
I/P 0/P
0 1
1 0
27
& Microprocessor
AND Gate
I/P1
O/P
I/P2
Truth Table
I/P1 I/P2 O/P
0 0 0
0 1 0
1 0 0
1 1 1
28
& Microprocessor
NAND Gate
I/P1
O/P
I/P2
Truth Table
I/P1 I/P2 O/P
0 0 1
0 1 1
1 0 1
1 1 0
29
& Microprocessor
OR Gate
I/P1
O/P
I/P2
Truth Table
I/P1 I/P2 O/P

0 0 0
0 1 1
1 0 1
1 1 1
30
& Microprocessor
NOR Gate
I/P1
O/P
I/P2
Truth Table
I/P1 I/P2 O/P

0 0 1
0 1 0
1 0 0
1 1 0
31
& Microprocessor
XOR Gate
I/P1
O/P
I/P2
Truth Table
I/P1 I/P2 O/P

0 0 0
0 1 1
1 0 1
1 1 0
32
& Microprocessor
XNOR Gate
I/P1
O/P
I/P2
Truth Table
I/P1 I/P2 O/P

0 0 1
0 1 0
1 0 0
1 1 1
33
& Microprocessor
Boolean Algebra
 Algebra of binary values(1 & 0)
 Types of operations
 OR (+)
 AND ( . )
 NOT (- or ‘ )
 Minimizes the basic circuits to perform digital operations
34
& Microprocessor
Algebraic Theorems
OR Laws
• A+0=A
• A + 1 =1
• A+A=A
• A+A=1
AND Laws
• A.0=0
• A.1=A
• A.A=A
• A.A=0
35
& Microprocessor
Laws of Complementation
 A=A
 1=0
 0=1
 If A=0, then A =1
 If A=1, then A=0
Commutative Laws
 A+B=B+A
 A .B = B .A
Associative Laws
 (A + B) + C = A + (B + C) = A + B + C
 (A.B).C = A.(B.C) = A.B.C
36
Distributive Laws
& Microprocessor
 A . (B+C) = A .B + A .C
 A + B.C = (A + B) . (A + C)
Other Expressions
 A + AB = A
 A . (A + B) = A
 A + AB = A + B
 A . (A + B) = AB
 AB + AB = A
 (A + B)(A + B) = A
 AB + AC = (A + C) . (A + B)
 (A + B) ( A + C) = AC + AB
 AB + AC + BC = AB + AC
 (A + B)(A + C)(B + C) = (A + B)(A + C)
37
& Microprocessor
Half Adder
Has two inputs (the bits to be summed)

Has two outputs (the sum bit and the carry bit)
AB CD
00 00
01 10
10 10
11 01
38
Full Adder – Truth Table & Microprocessor
an bn cn sn
cn+1
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
39
& Microprocessor
7 Segment LED Display
40
& Microprocessor
41
7 Segment LED Display– Truth Table & Microprocessor
INPUTS OUTPUT
X Y Z W A B C D E F G
L

E
0 0 0 0 0 1 1 1 1 1 1 0
G
1 0 0 0 1 0 1 1 0 0 0 0
A
2 0 0 1 0 1 1 0 1 1 0 1
L
3 0 0 1 1 1 1 1 1 0 0 1

4 0 1 0 0 0 1 1 0 0 1 1
D
5 0 1 0 1 1 0 1 1 0 1 1
I
6 0 1 1 0 1 0 1 1 1 1 1
G
7 0 1 1 1 1 1 1 0 0 0 0
I
8 1 0 0 0 1 1 1 1 1 1 1
T
9 1 0 0 1 1 1 1 1 0 1 1
S

1 0 1 0 1 0 0 1 1 1 1
E
1 0 1 1 1 0 0 1 1 1 1
R
1 1 0 0 1 0 0 1 1 1 1
R
1 1 0 1 1 0 0 1 1 1 1
O
1 1 1 0 1 0 0 1 1 1 1
R
1 1 1 1 1 0 0 1 1 1 1

42
& Microprocessor
TTL Circuit
 Stands for transistor - transistor logic.


Operates between cut-off and saturation.
 Advantages:
• Speed
• good fan – in and fan – out
• easy interface with other digital circuitry
43
& Microprocessor
Flip Flop
 Stores a binary digit
 Stable till a signal switches it
 Types of Types of flip flop
 S-R flip flop

 J-K flip flop
 D flip flop
 T flip flop
44
& Microprocessor
Registers
 Group of flip-flops
 Connected in parallel
 D flip-flop commonly used
Shift Register
 Shifts content unchanged
 Temporary storage
 Types:
 Serial-in, serial-out
 Serial-in, parallel-out
 Parallel in, serial-out
 Parallel in, parallel out
45
& Microprocessor
Counters
 Counts no. of pulses
 Modulus of Counter
• Binary Counter
• Decade Counter
• Pre settable Counter
Binary Counter
CLK
Q J Q J Q J Q J
Q k Q k Q k Q k
3 2 1 0
46
& Microprocessor
Asynchronous
 Types of Counters
Synchronous
 Up Counter
 Down Counter
 Up-Down Counter
 Controlled Counter
 Ring Counter
47
& Microprocessor
Computer Languages
 Machine Language
– 0 and 1
 Assembly Language
– mnemonics
– assembler
 High Level Language
– English like language

– Interpreters and Compilers
48
& Microprocessor
Execution of Assembly Language program
Source Program Floppy Disk
Loader
Assembler Floppy Disk
Object Program
 One to One Translation
49
& Microprocessor
Execution of High Level Language
Source Code
Translator
Object Code 1 Object Code 2 Object Code 3
 One to Many Translation
50
& Microprocessor
Compiler & Interpreter
 Interpreter translates line by line
- Slower
 Compiler translates the entire code
- faster
51
Session II
 Microprocessor – an Introduction
 General Architecture of Microprocessor
 Memory
 I/O
 Architecture of 8085 Microprocessor
52
Microprocessor – An
& Microprocessor
Introduction
Programmable Logical device
Functionality
• manipulates data
• Controls timing of various operations
• communicates with peripherals
Applications
• Automation & Control
53
Architecture & Operations of & Microprocessor
MPU
 Architecture
- Logical design of microprocessor
 Types of Operations
• Microprocessor initiated operations
• Internal Data Operations
• Peripheral initiated Operation
54
Microprocessor initiated
& Microprocessor
operations
 Communications Operations
• Memory Read
• Memory Write
• I/O Read
• I/O Write
 Steps involved
• Location Identification
• Transfer of data
• Providing Timing or synchronization signals
55
& Microprocessor
 Requirement
 Address Bus
• Unidirectional
• Arbitrary number – (commonly used 16)
• Capable of Addressing 2 n
 Data Bus
• Bidirectional
• Decides the range of data being handled
• Determines the word length and the register size
56
& Microprocessor
 Control Bus
• A number of Single lines

• Provides timing signals
 Communication Process
 To Read an instruction
• Location is identified by placing the address in Address Bus

• A pulse for initiating a READ is sent
• Data Bus brings the data to MPU
57
Internal Data Operations & Microprocessor
 Processing of Data and its Storage
• Arithmetic & Logical Operation

• Condition Testing
• Order of Execution
• Storing of Data
 Requirement
• Accumulator
• Flag Register
• General purpose Registers
• Program Counter
• Stack
58
& Microprocessor
(8085 Microprocessor)
 Accumulator
• Performs Arithmetic and logical Operations

• 8 bit Register
 Flag Register
• Used for Decision Making

• 5 Flags – Carry, Zero, Auxiliary Carry, Sign, Parity
 Program Status Word
59
& Microprocessor
 Registers
• Stores Data during Execution

• 6 8-bit registers – B, C, D, E, H and L
• Register Combination – BC, DE and HL
 Program Counter (PC)
• 16 Bit Memory Pointer

• Sequences the Execution
 Stack Pointer (SP)
• 16 Bit Memory Pointer

• Points to location in R/W Memory
60
& Microprocessor
Peripheral initiated Operation
Operations initiated by external devices
Reset
• Program Counter is cleared
Interrupt
• Normal Execution interrupted to execute Service Routine
Ready
• Synchronizes MPU operations with Peripherals
Hold
• Peripherals takes Control of Buses
61
& Microprocessor
Memory
 Stores Binary Values
 Types
• Read Write Memory (R/W M)

• Read Only Memory (ROM)
 R/W Memory (Random Access Memory)

• Volatile
• processes data
• Types:- Static & Dynamic
62
& Microprocessor
 Static R/W Memory
• Flip-flops
• Stored as Voltage
 Dynamic R/W Memory
• MOS Transistor
• Stored as charges
• Faster
• Refreshing Circuit
63
& Microprocessor
 ROM Memory
• Non Volatile
• Used for subroutines
• Cheap & Dense
• Types: -
 Masked ROM
 PROM (Programmable Read Only Memory)
 EPROM (Erasable Programmable Read Only Memory)
 EEPROM (Electrically Erasable PROM)
64
& Microprocessor
 Memory Organization
 A memory requires:
• Chips containing Registers

• Chip Select line
• R/W line
• Address lines
• I/O lines
 Memory Map
• Assigning a unique address for each register
65
& Microprocessor
 Size of Memory
• Number of Register
• R/W
Number of I/O lines
CS
Control Logic
A
D 110
D
110
A2 R
E
S 101
S
A1 100
D
E 011
A0 C
O 010
D
E 001
R
000
D7 D6 D5 D4 D3 D2 D1 D0
66
& Microprocessor
 Input / Output
• Communicates to the external world
 Methods of Communication
• Peripheral or Direct I/O
• Memory-Mapped I/O
67
& Microprocessor
• Peripheral or Direct I/O
 IN/OUT Transfers data

 8 Address Lines - 256 devices – Port Numbers
 Uses Control Lines – IOW & IOR
• Memory-Mapped I/O
 16 Address Lines
 Memory Map is shared
 Uses Control Lines – MEMW & MEMR
68
& Microprocessor
 Interfacing Devices
 Tri-State Device
• 3 stages – logic 1, logic 0 and high impedance
 Buffer
• Logic circuit which amplifies the current
 Latch D Q D PR Q
• a D flip-flop
G Q CK
CLR
Q
• Types :-
Transparent Latch Positive Edge Triggered
69
& Microprocessor
 Decoder
• Displays an output based on the combination
of input 2 to 4
Input Output
Decoder
2 to 4
Input Output
Encoder
 Encoder
• Outputs a code based on the input
70
& Microprocessor
8085 Microprocessor
 Features
• 8 bit
• Has 40 pins
• Multiplexed Address/ Data Bus
71
8085 & Microprocessor
X1 1 40 Vcc
PINOUT 2 39 HOLD
X2
RESET OUT 3 38 HLDA
SOD 4 37 CLK(OUT)
SID 5 36 RESET IN
TRAP 6 35 READY
RST 7.5 7 34 IO/M
RST 6.5 8 33 S1
RST 5.5 9 32 RD
INTR 10 31 WR
INTA 11 30 ALE
AD0 12 29 S0
14 28 A15
AD1
14 27 A14
AD2
15 26 A13
AD3
16 25
AD4 A12
17 24
AD5 A11
18 23
AD6 A10
19 22
AD7 A9
20 21 72
A8
+5V GND
8085 Signals & Microprocessor
Serial X1 X2 Vcc Vss

SID
I/O SOD A15
High-Order
Ports Address Bus
TRAP A8
RST 7.5
Interrupts RST 6.5 AD7
& RST 5.5 Multiplexed
Address/Dat
Externally INTR
a Bus
Initiated AD0
Signals READY
ALE
HOLD
S0
RESET IN Control
S1
And
IO/M
External Signal INTA
RD Status Signals
Acknowledgement HLDA
WR
RESET CLK OUT

OUT
73
& Microprocessor
 8085 Microprocessor Signal Groups
 Address Bus
• UniDirectional
• 8 Higher Order Address Bus
 Multiplexed Address/Data Bus
• BiDirectional
• Bus Multiplexing
• Latching of Low - order Address Bus – ALE
74
& Microprocessor
 Control and Status Signal
 ALE (Address Latch Enable)

• Generated in the beginning of each operation
• Latches low - order address from the multiplexed bus
 RD (Read)
• Active low Control Signal
• Reads from Memory / IO
 WR (Write)
• Active low Control Signal
• Writes to selected Memory / IO
75
A15 A15 & Microprocessor
A8 A8
ALE
AD7 EN A7
AD0 LATCH A0
D7
Data Bus
8085 D0
IO/M
MEMR
RD
WR MEMW
Control
Signals
IOR
IOW 76
& Microprocessor
 IO/M
• High – IO Operation
• Low – Memory Operation
 S1 and S0
• Status Signal – rarely used
• Identifies various operations
S1 So Desc.
0 0 HALT
0 1 WRITE
1 0 READ
1 1 FETCH
77
& Microprocessor
 Power Supply and Clock Frequency
• +5V power supply (Vcc)

• 3 MHz clock (X1 & X2)
• CLK – Used as System Clock for other devices
 Interrupts and Externally Initiated Operations
• Interrupts transfer the program control to specific memory

location
 INTR (Interrupt Request)

• A general-purpose interrupt.
 INTA (Interrupt Acknowledge)

• Acknowledges an interrupt
78
& Microprocessor
 RST 7.5 (Restart Interrupt)

• Highest priority Vectored Interrupt

• Vectored interrupt with a priority less than RST 7.5, but
more than RST 5.5 and INTR.

• Vectored interrupt with the least priority among Restart
Interrupts but more priority than INTR signals.
 TRAP (Input)
• A non-maskable restart interrupt.
• highest priority of any interrupt.
• Externally initiated signals are instantiated by an external

device
79
& Microprocessor
 HOLD
• Indicates a peripheral’s request to use address and data buses.
 HLDA ( Hold Acknowledge)

• Acknowledges the HOLD request.
 READY
• Delays microprocessor’s operation to work in pace with the
slow peripherals connected to it.
 RESET IN
• Sets program counter to zero
• The buses are tri-stated and MPU is reset.
 RESET OUT
• Indicates MPU is being reset
• Can be used to reset other devices.
80
& Microprocessor
 Serial I/O Ports
 SID (Input)
• Serial input data Line

• The data on SID is loaded into accumulator when a RIM
instruction is executed.
 SOD (output)
• Serial output data line.

• The output SOD is set or reset as specified by the SIM
instruction.
81
RST 6.5 Computer Architecture
INTA TRAP SID SOD
INTR RST 5.5 RST 7.5
& Microprocessor
Interrupt Control Serial I/O Control
Temp Instruction
Accumulator Multiplexer
Reg. (8) Register (8)
(8)
W Temp. Reg. Z Temp. Reg.
R
Flag (5)
e
Flip-flops B Reg. C Reg. g
i
Reg. Select
D Reg. E Reg. s
Instruction t
Decoder e
Arithmetic and H Reg. L Reg.
Logic Unit r
Machine
Cycle Stack
(ALU) A
Encoding r
(8) Program Counter
r
a
y
Address Latch (16)
Timing and Control
X1 CLK Reset
GEN Control Status DMA Address Buffer Data Address
x2
Buffer (8)
RD WR ALE S0 S1 IO/M HLDA RESET OUT A15 – A8
Ready HOLD RESET IN
Address Bus AD7 – AD0
82
Address/Data Bus
& Microprocessor
Registers
A Arithmetic Operations
(Accumulato Logical Operations
r)
8 Bits
B C B & C combined to form 16
8 8 Bits Bits
Bits
D E D & E combined to form 16
8 8 Bits Bits
Bits
H L H & L combined to form 16
83
& Microprocessor
Flags
S Z AC P CY
D7 D6 D5 D4 D3 D2 D1 D0
S Sign Set – Positive

Reset – Negative
Z Zero Set – Zero
Reset – Non-Zero
A Auxil Set – Carry From D3 to
C iary D4
Carr Reset – No Carry From
y D3 to D4 84
& Microprocessor
 Bus Timings
• Sequence of operations called instruction

cycle executes an instruction
• Instruction Cycle is divided into few basic
machine cycles
• Machine cycles are in turn divided into
System Clock Period.
 Example:
• To fetch a data 10101010 from a location
2005H
85
& Microprocessor
T1 T2 T3
CLK
High –Order
A15 – A8
Memory Address
Low -Order Memory
AD7 –AD0
Memory Address
Contents
ALE
IO/M
M
RD
86
& Microprocessor
Data Bus
Memory
B C
Instruction
ALU D E
Decoder
H L
Stack
Program Counter
Control
Logic
Address Bus
87
& Microprocessor
Instruction Set of 8085

 Instruction
• A command to perform a given task.
• A binary pattern designed inside a microprocessor to
perform a specific function on a specified data.
 Instruction Set
• Entire group of instructions that determines what functions
the microprocessor can perform.
 Parts of Instruction:
• Task to be performed – operation code (opcode)
• Data to be operated on – operand.
88
& Microprocessor
 Classification
• Instruction Word Size
 One-word or 1-byte instructions
 Two-word or 2-byte instructions
 Three-word or 3-byte instructions
• Functionality
 Data transfer (copy) operations
 Arithmetic operations
 Logical operations
 Branching operations
 Machine-control operations.
89
& Microprocessor
 ONE-BYTE INSTRUCTIONS
• Includes opcode and operand in single byte.

• Operand(s) are internal register
 Example:
• MOV C,A
 Both operand registers are specified.
• ADD B
 The operand B is specified and the accumulator is
assumed.
• CMA
 Accumulator is assumed to be the implicit operand
90
& Microprocessor
 TWO-BYTE INSTRUCTIONS
• Uses two-bytes
 First byte specifies the operation code
 Second byte specifies the operand.
 Source operand is a data byte
• Example
 MVI A, 32H
 THREE-BYTE INSTRUCTION
• First byte specifies the opcode

• Following two bytes specify the 16-bit address.
 second byte – low-order address or data
 third byte is the high-order address or data
• Example
 JMP 2085H, LXI H, 2050H
91
& Microprocessor
 DATA TRANSFER (COPY) OPERATIONS
• Copies data from a location called a source to

another location called a destination
• Contents of source not modified
• Types of data transfer :
 Between Registers.
 Specific data byte to a register or a memory location.
 Between a memory location and a register
 Between an I/O device and the accumulator.
92
& Microprocessor
 MOV
• Copies data from one register to another
• Syntax:
 MOV Rd, Rs
• Example:
 MOV A, B
 MVI
• Copies 8 Bit data to a specific register
• Syntax:
 MVI Rd, D
• Example:
 MVI C, 5
93
& Microprocessor
 OUT
• Copies the Contents of Accumulator to Port
• Syntax:
 OUT PortNo.
• Example:
 OUT 56
 IN
• Copies the Contents of the Port to Accumulator
• Syntax:
 IN PortNo.
• Example:
 IN 57
94
& Microprocessor
Between Registers
OP Oper Byt Description
Code and es
MOV Rd, 1 Copies data From
Rs Source Register Rs to
Between Registers and Memory
Destination Register
OP Oper BytesRd Description
Code and
MOV M, Rs 1 Copies data From
Source Register Rs
to Memory M
MOV Rd, 1 Copies data From 95
Data to/from Register, Memory & Microprocessor
OP Oper Byt
or I/O Port
Description
Code and es
IN 8 Bit 2 Copies data From
Port Specified port Address
Addr to Accumulator A
ess
OUT 8 Bit 2 Copies data From
Port Accumulator A to
Addr Specified port Address
ess
MVI R, 2 Loads the Data to the
Data Specified Register 96
Data to/from Register, Computer Architecture
& Microprocessor
Memory
OP Oper Byt
or I/O Port
Description
Code and es
LDA 16 3 Copies the content of
Bit Memory location
Addr specified by 16 bit
ess address to Accumulator
A
LDAX RP 1 Copies the content of
B/D Memory Location
Specified in Register Pair
B or D to Accumulator A
STA 16 3 Copies the content of
Bit Accumulator A to 97
& Microprocessor
 ARITHMETIC OPERATIONS
• Performs addition, subtraction, increment and decrement.
 Addition
• Adds an 8-bit data to the accumulator
• Carry Flag is set if the sum exceeds 8-bits
 ADD
• Adds a register’s content to the accumulator
• Syntax:
 ADD R
 ADI
• Adds an 8-bit data to the accumulator
• Syntax:
 ADI 8-bit Data
98
& Microprocessor
 Subtraction
• Subtracts an 8-bit data to the accumulator and the stores

the difference in it.
• Performed in 2's complement method
 SUB
• Subtracts a register’s content from the accumulator
• Syntax:
 SUB R
 SUI
• Subtracts an 8-bit data from the accumulator
• Syntax:
 SBI 8-bit Data
99
& Microprocessor
 Increment/Decrement
• Increments/Decrements 8-bit content by 1.

• Increments/Decrements 16-bit contents of a register pair
(such as BC)
 INR
• Increments the content of a register
• Syntax:
 INR B
 DCR
• Decrements the content of a register
• Syntax:
 DCR B
100
& Microprocessor
Arithmetic Operations
OP Ope Byt Description
Code rand es
ADD R/M 1 Content of the Register
or Memory is added to
the content of
Accumulator and the
result is stored in
Accumulator
SUB R/M 1 Content of the Register
or Memory is subtracted
from the content of
Accumulator and the 101
& Microprocessor
 LOGICAL OPERATIONS
• Performs logical operations with accumulator content
 AND, OR, Exclusive-OR

• Performed on an 8-bit data and accumulator content
 AND
• Logically AND the Register Content with Accumulator
Content
• Syntax:
 AND R
 ANI
• Logically ANd Immediately 8-Bit Data with Accumulator
Content
• Syntax:
 ANI 14
102
& Microprocessor
 ORA
• Logically OR contents of Register with Accumulator
• Syntax:
 ORA C
 ORI
• Logically OR Immediately 8 Bit Data with Accumulator
• Syntax:
 ORI D
103
& Microprocessor
 XRA
• Logically Exclusive - OR the contents of Register with

Accumulator
• Syntax:
 XRA C
 XRI
• Logically Exclusively - OR immediately 8 Bit Data with

Accumulator
• Syntax:
 XRI 6
104
& Microprocessor
 CMA
• Complements the contents of accumulator

• No Flags are affected
• Syntax:
 CMA
 Rotate
• Shifts Bits in the accumulator either left or right
 Compare
• Compares an 8-bit data with accumulator content
105
& Microprocessor
 BRANCHING OPERATIONS
• Alters program execution sequence either conditionally
or unconditionally.
 Jump
• Conditional jump
 Alters program sequence when condition test is true
• Unconditional jump
 Alters program sequence without condition checking
 Call
• Changes sequence of a program by calling a subroutine
 Return
• Changes sequence of a program by returning from a
subroutine
106
& Microprocessor
 Unconditional jump
 JMP
• The program control is transferred to a particular

memory address
• Syntax:
 JMP Address
• Example:
 JMP F200
107
& Microprocessor
 Conditional Jump
• Based on Condition of the flags
• All Instructions are followed by a 16-Bit address
 JC
• Transfers program control to a particular address if Carry Flag
is Set
 JNC
• Transfers program control to a particular address if Carry Flag
is not Set
 JZ
• Transfers program control if Zero Flag is Set
 JNZ
• Transfers program control if Zero Flag is not Set 108
& Microprocessor
 JP
• Transfers program control if Sign Flag is not Set
 JM
• Transfers program control if Sign Flag is Set
 JPE
• Transfers program control if Parity Flag is Set
 JPO
• Transfers program control if Parity Flag is not Set
109
& Microprocessor
 MACHINE CONTROL OPERATIONS

• Controls machine functions
• Examples:
 Halt, Interrupts, No Operation
 Halt
• Processor Stops Executing
• Syntax:
 HLT
 No Operation
• No Operation is performed
• Syntax:
 NOP
110
& Microprocessor
 8085 ADDRESSING MODES
• Addressing Modes specifies various formats for operands
 a register, an input/ output port, or an 8-bit number
 Types:
• Immediate addressing.
• Register addressing.
• Direct addressing.
• Indirect addressing.
111
& Microprocessor
 Immediate Addressing
• Data is present in the instruction

• Example:
 MVI R,data
 Register addressing
• Data is provided through the registers.

• Example:
 MOV Rd, Rs
112
& Microprocessor
 Direct addressing
• Accepts data from or sends data to the outside device.
• Example:
 IN 00H or OUT 01H
 Indirect Addressing
• Effective Address is calculated by the processor
• The contents of the address (and the one following) is

used to form a second address where the data is stored
113
Assembly Language & Microprocessor

Programming
Memory Address
• 16 bit address of System Memory
 Machine Code
• Hexadecimal entered in System Memory
 Opcode
• Abbreviated Symbols specified by manufacturer
 Operand
• Item to be processed
 Comments
• Documentation explaining purpose of instructions used
114
& Microprocessor
Assembly Language Program

Program to accept and display a number
Task Mnemonics
1. Load Register B with 4EH MVI B, 4EH
2. Copy the Number to Accumulator MOV A, B
3. Sent the Number to Output Port OUT, Port1
4. End of the Program HLT
115
& Microprocessor
Programming Format
OP Opera Description
Code nd
MVI B, Loads 37H to Register B
37H
MOV A, B Copies Content of Register B
to Accumulator
OUT Port1 Sends 37H to Port ‘Port1’
HLT None End of the Program
116
& Microprocessor
Arithmetic Operations
Code and es
ADD R/M 1 Content of the Regis
or Memory is added
the content
Accumulator and
result is stored
Accumulator
SUB R/M 1 Content of the Regis
or Memory is subtrac
from the content
Accumulator and
result is stored
117
& Microprocessor
 Loops
• Executes a set of instructions repeatedly

• Types
 Continuous Loop
 Conditional Loop
 Continuous Loop
• Uses unconditional jump
 Conditional Loop
• Uses Conditional Jump
118
& Microprocessor
 Counter
• Executes certain set of instructions a
specified number of times
• Uses the concept of conditional loop
• Can be incremented or decremented
119
& Microprocessor
First Program
 Load a number to Register B and
display the output in Port1
Steps:
1. Load registerStartB with a Number
2. Send to Output
In Register to Port1
Input Number
AlgorithmOutput Number
Stop
120
CA & µP
Unit IV
121
& Microprocessor
Setting up a Counter
 Executes certain set of instructions a specified number of times
 A Register is Loaded with a number
 Using INR (Increment) or DCR (Decrement) the number is

Incremented or Decremented
 Uses the concept of conditional loop
 Time delay required
 If the register reaches the final count the loop is terminated
122
& Microprocessor
Flowchart
Start
Initialize
Update
No Is the
Final
Count
Yes
End
123
& Microprocessor
Time Delay
124
& Microprocessor
Frequency & Time/Clock Period

Frequency in the Processing Speed of a Processor
Time Period = (Frequency)-1
Time Period = 1
Frequency
T - States
One Subdivision of the operation performed in one clock period
125
& Microprocessor
Time Delay
 Uses the concept of counter
 No. of Counts depends on T-States.
 Calculation of Time for Execution:

 Clock Period = 1/frequency
 Time for Execution of Instruction =
No. of T-States X Clock Period
126
& Microprocessor
Simple Time Delay Program

MVI B, 77H - 7 T-States
Loop: DCR B - 4 T-States
JNZ LOOP - 10/7 T-States
HLT - 5 T-States
127
& Microprocessor
Time Delay
 Time Delay in executing the Loop
TL = (Time Period T X Loop T-States X

Equivalent Decimal Number N10)
 Total Time Delay in executing the Loop
TLA = TL – Time Adjustment
128
& Microprocessor
Time Delay for the Program

T-States Inside the Loop
Let us Assume the
Frequency of the
DCR B -
Processor is 2MHz 4
JNZ LOOP - 10 Count
f = 2 MHz
Total = 14 FFH = 25510
T = 1/f T-States Outside the Loop

MVI B, FFH - 7
T = 1/2 MHz
HLT - 5
T = 0.5 µSec. Total = 12
129
& Microprocessor
Time Delay Inside the Loop

 TL = T x T States x N10
 TL = 0.5 µSec. x 14 x 255
 TL = 1785 µSec.
 TL = 1.785 mSec.
Total Time
 T
LA = 1.785 mSec. - (10-7) x 0.5 µSec.
 TLA = 1.785 mSec. - 0.0015 mSec.

 TLA = 1.7835 mSec.
130
& Microprocessor
Total Time Delay

Time to Execute the instruction outside the loop
TD = +
Time taken to execute the instruction inside the
loop
TD = TO + TLA
Where TO = T-States Outside the loop X Time

Period
131
& Microprocessor
Total Time Delay

TO = 12 x 0.5 µSec.
TO = .006 mSec.
TD = TO + TLA
TD = 0.006 mSec + 1.7835 mSec.
TD = 1.7895 mSec.
TD ≈ 1.8 mSec.
Total Time Required to execute the program is 1.8 milli Seconds

(Approx.)
132
& Microprocessor
Note:
 Time Delay can be Varied by
changing the Count number FFH.
 To Increase the time delay more the

1.8 mSec. the user should use the
Additional Instruction or Register
Pair.
133
& Microprocessor
Time Delay Using Register Pair

Program
LXI B, FFFFH - 10 T-States
Loop: DCX B - 6 T-States
MOV A, C - 4 T-States
ORA B - 4 T-States
JNZ Loop - 10/7 T-States
HLT - 5 T-States
134
& Microprocessor
Time Delay
T-States Inside the Loop Count
Let us Assume DCX
the B - 6 FFFFH = 6553510
Frequency of theMOV A,C - 4
Processor is 2MHz
ORA B - 4
JNZ LOOP - 10
f = 2 MHz

Total = 24
T-States Outside the
T = 1/f

Loop
LXI B, FFFFH - 10
T = 1/2 MHz

HLT - 5
Total = 15
T = 0.5 µSec.

135
& Microprocessor
Time Delay in the Loop

 TL = T x T States x N10
 TL = 0.5 µSec. x 24 x 65535
 TL = 786420 µSec.
 TL = 786.42 mSec.
Total Time
 T
LA = 786.42 mSec. - (10-7) x 0.5 µSec.
 TLA = 786.42 mSec. - 0.0015 mSec.

 TLA = 786.4185 mSec.
136
& Microprocessor
Total Time Delay

TO = 15 x 0.5 µSec.
TO = .0075 mSec.
TD = TO + TLA
TD = 0.0075 mSec + 786.4185 mSec.
TD = 786.426 mSec.
TD ≈ 786.4 mSec.
Total Time Required to execute the program is 786.4 milli

Seconds (Approx.)
137
Start & Microprocessor
Flowchart
Initialize Loop2
Initialize Loop1
Update
No
Is the Final
Count
Yes
Update
No
Is the Final
Count
Yes
End
138
Time Delay Using Loop within a & Microprocessor
Loop
Program
MVI B, FFH - 10 T-States
Loop2: MVI C, FFH - 10 T-States
Loop1: DCR C - 6 T-States

L1 L2
JNZ Loop1 - 10/7 T-States
DCR B - 6 T-States
JNZ Loop2 - 10/7 T-States
HLT - 5 T-States
139
& Microprocessor
Time Delay
T-States Inside the Loop1 T-States Outside the Loops
Let us Assume DCR

the C - 4 MVI B, FFH - 7
Frequency of theJNZ Loop1 - 10 MVI C, FFH - 7
Processor is 2MHz
Total = 14 HLT - 5
T-States Inside the Loop2 Total = 19
f = 2 MHz

DCR C - 4
JNZ Loop1 - 7
T = 1/f

DCR B - 4 Count
JNZ Loop2 - 10
Loop1 Count = FFH = 25510
T = 1/2 MHz

Total = 21
Loop2 Count = FFH = 25510
T = 0.5 µSec.

140
& Microprocessor
Time Delay in the Loop1

 TL1 = T x T States x N10
 TL1 = 0.5 µSec. x 14 x 255
 TL1 = 1785 µSec.
 TL1 = 1.785 mSec.
Total Time
 T
LA1 = 1.785 mSec. - (10-7) x 0.5 µSec.
 TLA1 = 1.785 mSec. - 0.0015 mSec.

 TLA1 = 1.7835 mSec.
141
& Microprocessor
Time Delay in the Loop2

TL2 = (TLA1 + T-States X Time Period) X Count N10
 T
L2 = (1.7835 mSec. + 21 x 0.5 µSec.) x 255
 TL2 = 457470 µSec.

 TL2 = 457.47 mSec.
Total Time
 TLA2 = 457.47 mSec. - (10-7) x 0.5 µSec.
 TLA1 = 457.47 mSec. - 0.0015 mSec.
 TLA1 = 457.4685 mSec.
142
& Microprocessor
Total Time Delay

TO = 19 x 0.5 µSec.
TO = .0095 mSec.
TD = TO + TLA2
TD = 0.0095 mSec + 457.4685 mSec.
TD = 457.478 mSec.
TD ≈ 457.5 mSec.
Total Time Required to execute the program is 457.5 milli

Seconds (Approx.)
143
& Microprocessor
Sample Program
Write a program to count continuously in hexadecimal
from FFH to 00H in a system with a clock period of 0.5
µSec. Use Register D to setup one millisecond delay
between each count and display the count in one of the
Output Ports
Note:
 To Count from FFH the register to be initialized with

0OH
 Separate Time Delay Loop to be Set
 The Count to be Displayed in Output Port
144
& Microprocessor
Program
MVI E, 00H - 7 T-states
Count: DCR E - 4 T-states
MVI D, Count No. - 7 T-states
Delay: DCR D - 4 T-states
JNZ Delay - 10/7 T-states
MOV A, B - 4 T-states
OUT Port - 10 T-states
JMP Count - 10 T-states
145
To Calculate Time Delay Count & Microprocessor
No.
T = 0.5 µSec.
TL = (T-States x T) x Count No.
TL = (14 x 0.5 µSec.) x Count No.
TL = 0.007 mSec. x Count No.
TLA = (0.007 mSec. x Count) - 0.0015 mSec.
TO = 35 x 0.5 µSec. = 0.0175 mSec.
TD = (0.007 mSec. x Count) - 0.0015 mSec. + 0.0175 mSec.
1 mSec. = (0.007 mSec. x Count) + 0.016 mSec.
1 mSec. – 0.016 mSec.
Count No. = = 140.571 ≈ 14110 ≈ 8CH
0.007 mSec.
 Count No. = 8CH, 8CH should be loaded into register D to set 1

millisecond delay
146
& Microprocessor
Stack
 Set of Memory Locations in R/W memory
 Used to store binary information temporarily during the

execution of a program
 Beginning of Stack is defined using

LXI SP, 16 bit Address
 Stack pointer is decremented by one
 The byte stored to stack with the address specified in Stack

Pointer
 The Storage & Retrieval on stack follows LIFO (Last in First Out)
147
Storing Register Pair Content to & Microprocessor
 Stack
Using Inst. PUSH the contents of a Register Pair can be copied to stack
 Using Inst. POP the contents from the stack is copied to Register Pair
OP Ope Bytes Description

Cod ran
e d
PUS Rp. 1 Decrement the
H Stack Pointer by
one the content of
higher order (B, D,
H, A) is copied into
stack then the
Stack Pointer is 148
& Microprocessor
Stack Instructions
PUSH B - From Rp. BC to Stack
PUSH D - From Rp. DE to Stack
PUSH H - From Rp. HL to Stack
PUSH PSW - From Accumulator & Flags to Stack
POP B - From Stack to Rp. BC
POP D - From Stack to Rp. DE
POP H - From Stack to Rp. HL
POP PSW - From Stack to Accumulator & Flags
Note: PSW stands for Program Status Word
149
& Microprocessor
Example:
Program:
1 LXI SP, 2000H

2 LXI H, 4253H
3 PUSH H
4 NOP
5 POP B
6 HLT
150
Register Contents after & Microprocessor
executing
A
first 2 Instructions
B X X
D
H 42 53
SP 2000
Register Contents after
A
executing PUSH Instructions
B X X Memory
D 53 1FFE
H 42 53 42 1FFF
SP 2000 X 2000
151
Register Contents after & Microprocessor
executingAPOP Instructions Flags

Memory B 42 53 C
53 D E
42 H 42 53 L
X SP 2000
152
& Microprocessor
 Program to Clear all Flags , Load 00H in the accumulator and

demonstrate the zero flag is not affected by data transfer
instruction. Logically OR the accumulator with itself to set the
zero flag, and display the flag at Port1 or store all the flags
on the stack.
LXI SP, 2000H - Initialize Stack Pointer
MVI L, 00H
PUSH H To Clear Flags
POP PSW
MVI A, 00H - Loading Accumulator with 00H
A Data Transfer Instruction
PUSH PSW
Getting Flag content to Reg. L
POP H 153
& Microprocessor
MOV A, L
Display Flags
OUT Port1
ORA A - Reset CY & AC
PUSH PSW
Getting Flag content to Reg. L
POP H
MOV A, L
ANI 40H Masking all flags except Z & Display
OUT Port1
HLT - End of the Program 154

& Microprocessor
Subroutine
 It is group of Instructions written separately from the main program to perform a
function no. of times in the main program.
 If a Time Delay is required for no. of times in a main program, to avoid repetition of
same delay instruction, Subroutine is used
 Instruction
OP Oper Bytes Description

Code and
CALL 16 3 The Program
bit Sequence is
addr transferred to the
ess specified 16 bit
address 155
& Microprocessor
CALL & RET

 Call Inst.
• Saves the contents of Program Counter on the stack
• Jumps unconditionally to the memory location
specified by 16 bit address (Note: Conditional Call
Statements are also there)
 RET inst.
• Copies the content in the top two location of the
stack
• Unconditional Return from Subroutine (Note:
Conditional Return Statements are also there)
156
& Microprocessor
Example
Mem. Instruc Description
Add. tion
2000 LXI SP, Initialize the stack pointer
H 4000H with 2400H
2004 CALL Calling the subroutine at
H 3000H 3000H
2007 Inst. Other Instructions
H
2008 HLT End of Main Program
H
157
& Microprocessor
Flow of Subroutine
Main Program
2000H Subroutine
…
2004H 3000H Start
2005H 3001H
2006H 3002H End
… …
… …
…
158
Data Transfer During CALL
& Microprocessor
Instruction Mem. Code

Add. (H)
2004 CD
H
2005 00
H
2006 30
H
159
PC, Stack & SP during CALL & Microprocessor
Program
Counter
Inst. Stack Pointer
Register
CALL
20 40
04 00
20 3F
05 STACK FF
20 3F
0 3FFE
06 FE
7 3FFF
20 2 4000
07 0
X
X 160
Data Transfer During CALL & Microprocessor
Instruction
Machi Stack Addr Progr Data Inter
ne Point ess am Bus nal
Cycle er Bus Count (DB) Regis
s 3FFE (AB) er ters
(W)
(Z)
M1 3FFE 3002 3003 C9 -
Opcod Opcod
e e
Fetch
M2 3FFF 3FFE 07 161
& Microprocessor
Traffic Signal Controller

Program to provide given on/off timer to three traffic lights
(Green, Yellow, and Red) and two pedestrian signs (WALK
and DON’T WALK). The signal lights and signs are turned
on/off by the data bits of an output port as shown below:
Lights Data Bits On Time
1. Green D0 15 seconds
2. Yellow D2 5 seconds
3. Red D4 20 seconds
4. WALK D6 15 seconds
5. DON’T WALK D7 25 seconds
The traffic and pedestrian flow are in the same direction; the
pedestrian should cross the road when the Green light is on.
162
& Microprocessor
The problem is primarily concerned with providing various time delays

for a complete sequence of 40 seconds.
The on/off times for the traffic signals and pedestrian signs are as
follows:
163
& Microprocessor
 The Green light and the WALK sign can be turned

on by sending data byte 41H to the output port.
 The 15-second delay can be provided by using a 1-

second subroutine and a counter with a count of
1510.
 Similarly, the next two bytes, 84H and 90H, will

turn on/off the appropriate lights/signs as shown
in the flowchart.
 The necessary time delays are provided by

changing the values of the count in the counter.
164
Main Program & Microprocessor
LXI SP, XX99 - Initialize Stack Pointer with XX99H

START: MVI A, 41H - Loading Accumulator with Pattern for Green
& Walk
OUT PORT1 - Turn on corresponding lights
MVI B, 0FH - Reg. B is used to count 15 seconds
CALL DELAY - Call subroutine of one second delay
MVI A, 90H - Loading Accumulator with Pattern
MVI B, 05 - Reg. B is used to count 5 seconds
MVI A, 90H - Loading Accumulator with Pattern
MVI B, 14H - Reg. B is used to count 20 seconds
165
JMP START - Go to START to repeat the Sequence
Subroutine & Microprocessor
Delay: PUSH D Save the contents of DE & Accumulator

PUSH PSW
Sec: LXI D, COUNT No. - Load Rp. DE with Count No.
Loop: DCX D - Decrement Rp. DE by one
MOV A, D Check Rp. DE is Zero
ORA E
JNZ Loop - Jump to Loop if Zero Flag is not Set
DCR B - Decrement Reg. B
JNZ Sec - Jump to Sec if Zero Flag is not Set
POP PSW
POP D Retrieve contents of saved Registers
RET - Returning to Main Program 166
& Microprocessor
BCD – Binary Coded Decimal

 8610 = (8 x 10) + 2
 Converting a 2-digit BCD number into its binary

equivalent requires the following steps:
• Separate an 8-bit packed BCD number into two 4-bit

unpacked BCD digits: BCD1 and BCD2.
• Convert each digit into its binary value according to its

position.
• Add both binary numbers to obtain the binary equivalent of

the BCD number.
167
& Microprocessor
Example
 Convert (86)BCD into its binary equivalent
Solution: 8610 = 1000 0110 BCD
 0111 0010
• 00000110 Unpacked BCD1
• 00001000 Unpacked BCD2
 Multiply BCD2 by 10 (8 x 10)
 Add BCD1 to the answer in Step 2.
168
2 Digit BCD to Binary Computer Architecture
Conversion
& Microprocessor
A BCD number between 0 and 99 is stored in a R/W memory

location called the Input Buffer. Write a main program and a
conversion subroutine (BCDBIN) to convert the BCD number into its
equivalent binary number. Store the result in a memory location
Main Program
defined as the Output Buffer.
LXI SP, “STACK” - Initialize stack

LXI H, “INBUF” - Initialize Input Location
LXI B, “OUTBUF” - Initialize Output Location
MOV A, M - Input of BCD No.
CALL BCDBIN - Calling Subroutine
STAX B - Storing Binary No. to Output Buf.
HLT - End of the Program
169
Subroutine
& Microprocessor
BCDBIN; BCD to Binary

; I/P: packed BCD in Acc.
; O/P: Binary in Acc.
PUSH B - Save Rp.
MOV B, A - Copies Acc. Contents to Reg. B
ANI 0FH - ANDing (A) with 0FH to mask MSB
MOV C, A - Copies Acc. Contents to Reg. C
MOV A, B - Copies Reg. B contents to Acc.
ANI F0H - ANDing (A) with F0H to mask LSB
RRC
RRC Making MSB as LSB
RRC
RRC
MOV D, A - Copies Acc. Contents to Reg. D
XRA A - Clearing Acc. & Flags
Cont. 170
& Microprocessor
Cont.
MVI E, 0AH - Load Reg. E with 0AH = 1010

Sum: ADD E - Add (E) to (A)
DCR D - Decrement (D) by one
JNZ Sum - Jump to location Sum in Zero flag is reset
ADD C - Add (C) to (A)
POP B - Retrieve (BC)
RET - Returning to Main Program
171
Binary to BCD
& Microprocessor
A binary number is stored in memory location BINBYT. Convert the

number into BCD, and store each BCD as unpacked BCD digits in the
Output Buffer. To perform this task, write a main program and two
subroutines: one to supply the powers of ten, and the other to perform
the conversion.
Main Program
START:LXI SP, STACK - Initialize stack pointer
LXI H, BINBYT - Point HL index where binary number is stored
MOV A, M - Transfer byte
CALL PWRTEN - Call subroutine to load powers of 10
HLT - End of the Program
172
Subroutine PWRTEN
& Microprocessor
PWRTEN; Loads the powers of 10 in register B and calls the

binary to BCD
;I/P: Binary number in the accumulator
;O/P: Powers of ten and store BCD1 in the first Output-
Buffer
;Calls BINBCD routine and modifies register B
:LXI H, OUTBUF - Point HL index to Output-Buffer

memory
MVI B, 64H - Load 100 in register B
CALL BINBCD - Call conversion
MVI B, 0AH - Load 10 in register B
CALL BINBCD - Calls BINBCD subroutine
MOV M, A - Store BCD1
RET - Returning to Main Program
173
Subroutine BINBCD
& Microprocessor
BINBCD ;Converts a binary number into BCD and stores BCD2

and
;BCD3 in the Out put Buffer.
;I/P: Binary number in accumulator and powers of 10 in B
;O/P: BCD2 and BCD3 in Output Buffer
;Modifies accumulator contents
:MVI M, FFH - Load buffer with (0 -1)

NB: INR M - Clear buffer and increment for each
subtraction SUB B - Subtract power of 10 from binary
number
JNC NB - Is number > power of 10? If yes, add 1 to
buffer
ADD B - If no, add power of 10 to get remainder
INX H - Go to next buffer location
RET - Returning to Subroutine PWRTEN
174
BCD to 7 Segment Display
& Microprocessor
Write a main program and two subroutines, called UNPAK and

LEDCOD, to unpack the BCD numbers and select an appropriate
seven-segment code for each digit. The codes should be stored in the
Output-Buffer memory.
Main Program
LXI SP, STACK - Initialize stack pointer
LXI H, XX50H - Point HL index where BCD digits are stored
MVI D, 03H - Number of digits to be converted is placed in D
CALL UNPAK - Call subroutine to unpack BCD numbers
HLT - End of Program
175
Subroutine UNPACK
& Microprocessor
UNPAK;This subroutine unpacks the BCD number into two

single digits.
;I/P: Starting memory address of the packed BCD numbers in
HL ;registers: Number of BCDs to be converted in register
D
;O/P: Unpacked BCD into acc. and Output Buffer address in BC
;Calls subroutine LEDCOD
LXI B, BUFFER - Point BC index to the buffer memory

NBCD: MOV A, M - Get packed BCD number
ANI F0H - Masked BCD1
RRC Rotate four times to place BCD2 as
RRC unpacked single digit BCD
RRC
RRC
176
Subroutine UNPACK
& Microprocessor
CALL LEDCOD - Find seven-segment code

INX B - Point to next buffer location
MOV A, M - Get BCD number again
ANI 0FH - Separate BCD1
CALL LEDCOD -
INX B -
INX H - Point to next BCD
DCR D - Conversion complete, reduce BCD count
JNZ NBCD - If all BCDs are not yet converted, go
back
to convert next
RET - Return to Main Program
177
Subroutine LEDCOD
& Microprocessor
LEDCOD;This subroutine converts an unpacked BCD into its

seven-segment
; LED code
;I/P: An unpacked BCD in accumulator
;Memory address of the buffer in BC register
;O/P: Stores seven-segment code in the output buffer
: PUSH H - Save HL contents of the caller
LXI H, CODE - Point index to beginning of 7-segment code
ADD L - Add BCD digit to starting address of code
MOV L, A - Point HL to appropriate code
MOV A, M - Get seven-segment code
STAX B - Store code in buffer
POP H - Retrieve (HL) Rp.
RET - Return to Subroutine UNPACK
178
Binary to ASCII
& Microprocessor
Write a program to Transfer the byte to the accumulator, Separate

the two nibbles (as 09 and 0F). Call the subroutine to convert each
nibble into ASCII Hex code and Store the codes in memory locations
XX60H AND XX61H. Write a subroutine to convert a binary digit (0 to
F) into ASCII Hex code.. An 8-bit binary number (e.g., 9FH) is stored
in memory location XX50H.
Main Program
LXI SP, STACK - Initialize stack pointer
LXI H, XX50H - Point index where binary number is stored
LXI D, XX60H - Point index where ASCII code is to be
stored
MOV A, M - Transfer byte
MOV B, A - Save byte
RRC Shift high-order nibble to the position of low-
RRC order nibble
RRC
RRC
179
Binary to ASCII
& Microprocessor
Main Program – Cont.
CALL ASCII - Call conversion routine

STAX D - Store first ASCII Hex in XX60H
INX D - point to next memory location,
get ready to
store next byte
MOV A, B - Get number again for
second digit
CALL ASCII
STAX D
HLT
180
Binary to ASCII
& Microprocessor
Subroutine – ASCII
ASCII ; Converts a binary digit between 0 and F to

ASCII Hex code
;Input: Single binary number 0 to F in the
accumulator
;Output: ASCII Hex code in the accumulator
:ANI 0FH - Mask high-order nibble
CIP 0AH - Is digit less than 1010?
JC CODE - If digit is less than 1010, go to
CODE to add 30H
ADI 07H - Add 7H to obtain code for digits from A
to F
CODE: ADI 30H - Add base number 30H
RET - Return to Main Program 181
ASCII to Binary
& Microprocessor
Write a subroutine to convert an ASCII Hex number into its

binary equivalent. A calling program places the ASCII
number in the accumulator, and the subroutine should pass
the conversion back to the accumulator.
Subroutine
ASCBIN;This subroutine converts an ASCII Hex number into

its binary
;Input: ASCII Hex number in the accumulator
;Output: Binary equivalent in the accumulator
:SUI 30H - Subtract 0 bias from the number
CPI 0AH - Check whether number is between 0 and 9
RC - If yes, return to main program
SUI 07H - If not, sub. 7 to find number between A & F
182
RET - Return to Main Program
BCD Multiplication
& Microprocessor
A multiplicand is stored in memory location XX50H and a

multiplier is stored in location XX51H. Write a main program to
transfer the two numbers from memory locations to the HL
registers and store the product in the Output Buffer at XX90H.
Write a subroutine to Multiply two unsigned numbers placed in
registers H and L and Return the result into the HL pair.
Main Program
LXI SP, STACK

LHLD XX50H- Place contents of XX50 in L register and
contents of XX51 in H register
XCHG - Place multiplier in D and multiplicand in E
CALL MLTPLY - Multiply the two numbers
SHLD XX90H - Store the product in locations XX90 and
91H
HLT - End of the Program 183
BCD Multiplication
& Microprocessor
Subroutine - MLTPLY
MLTPLY:MOV A, D - Transfer multiplier to accumulator

MVI D, 00H - Clear D to use in DAD instruction
LXI H, 0000H - Clear HL
MVI B, 08H - Set up register B to count eight rotations
NXTBIT:RAR - Check if multiplier bit is 1
JNC NOADD - If not, skip adding multiplicand
DAD D - If multiplier is 1, add multiplicand to HL and
place partial result in HL
NOADD:XCHG - Place multiplicand in HL
DAD H - And shift left
XCHG - Retrieve shifted multiplication
DCR B - One operation is complete, decrement counter
JNZ NXTBIT - Go back to next bit
RET - Return To Main Program 184
& Microprocessor
Interfacing Peripherals
 Primary Function of MPU is to accept and send data

from I/P & to O/P Devices
 These I/O & O/P Devices are called peripherals or I/Os
 Interfacing is to enable the MPU to communicate with

the peripherals.
185
& Microprocessor
Classification of Interfacing
 Communication
• Synchronous – Both transmitter & Receiver aer
synchronized by same clock pulse
• Asynchronous – Both of Irregular Intervals
 Transfer of Data
• Parallel – Entire word is transmitted at a time
• Serial – One bit at a time over single line
 I/O Types
• Peripheral I/O – Identified with 8 bit address
• Memory mapped I/O – Identified with 16 bit address
186
& Microprocessor
Interrupt
 A computer input that temporarily suspends the normal
sequence of operations and transfer control to a special
routine.
 Interrupt Process is controlled by Interrupt Enable flip-flop,

which can be set or reset by using software Instruction.
 INTR (pin 10) goes high the Microprocessor is interrupted,

which is maskable & can be disabled
 Microprocessor also has additional vectored interrupt

signals.
187
& Microprocessor
Vectored Interrupt
 Maskable
• RST 7.5 - 003CH
• RST 6.5 - 0034H
• RST 5.5 - 002CH
 Non-maskable
• TRAP - 0024H
188
Interrupt Instruction Computer Architecture
& Microprocessor
Code and es
EI None 1 The Interrupt Enable flip-
flop is set and all the
RSTMneInstruction
interrupts
Hex Call are enabled
DI Nonemoni CodInterrupt
1 The Locati Enable flip-
cs flope is reset
on and all the
RST interrupts
C7 0000except TRAP
0 are disabled
H
RST CF 0008
1 H
RST D7 0010
2 H 189
Real Time Example to Interrupt
& Microprocessor
 Interrupt Process is to compare it to a telephone line with a
blinking light instead of ring when you are reading a book.
Ste The Telephone The interrupt

p System should beprocess should be
1: enabled enabled by writing
the instruction EI
Ste Have glance at the When the
p light at certain microprocessor is
2: intervals to check executing a
whether someone program, it checks
is calling the INTR line
during the
execution of each
190
& Microprocessor
Ste Assuming that the The signal INTA is

p caller is you used to insert an
4: roommate, the instruction,
request may be: It preferably, a
is going to rain restart (RST)
today. Will you instruction,
please shut all the through additional
windows in my hardware. The
room? RST instruction is a
1-byte call
instruction that
transfers the
program control to
191
& Microprocessor
Ste You shut your The service routine

p roommate’s should include the
7: windows instruction EI to
enable the
interrupt again.
This is similar to
putting the
receiver back on
To implement Step 4 in the interrupt process, insert one of RST
theexternal
instructions in the microprocessor by using hookhardware and the
signal INTA (Interrupt Acknowledge)
Ste You go back your At the end of the
p book, find your subroutine, the
8: mark, and start RET instruction
reading again retrieves the 192
& Microprocessor
Buffer to enable RST 5
193
8085 Interrupt & Vector & Microprocessor
Locations
194
Instruction to Read & Write Computer Architecture
& Microprocessor
Interrupts
OP Oper Byt
OP Oper Byt Description Description
Code and es
SIM None 1 Multipurpose Instruction
and used to implement
SIM Data Bytes the 8085 interrupts and
D7 D6 D5 DSerial 4 D3 DataD2 Output
D1 D0
RIM SO None SD X1 R7 M M M Instruction
Multipurpose M
D E X .5 andSEused 7. to 6. read 5. the
Serial Output data X 8085 5 5 5
interrupts
Mask Set Enable
and
Serial Data Enable Don’t D
3=1
1 = Enable Care
Serial Data Input
Mask Interrupts
If bits = 1
0 = Disable
Reset RST 7.5
If D4 = 1
195
RIM Data Bytes & Microprocessor
D7 D6 D5 D4 D3 D2 D1 D0
SI I 7 I I 5 IE 7. 6. 5.
D 6 5 5 5
Interrupt Enable
Serial Input Data 1 = Enable
Pending Interrupts Interrupt Masks
1 = Pending 1 = Masked
Instruction Set to enable all the interrupts of 8085
EI ;Enable Interrupts
MVI A, 08H ;Load bit pattern to enable RST 7.5, 6.5 and 5.5
SIM ;Enable RST 7.5, 6.5 and 5.5
196
& Microprocessor
Assuming the microprocessor is completing an RST 7.5
interrupt request, check to see if RST 6.5 is pending. If
it is pending, enable RST 6.5 without affecting any other
interrupts; otherwise, return to the main program.
RIM ;Read interrupt mask.

MOV B,A ;Save mask information
ANI 20H ;Check whether RST 6.5 is pending
JNZ NEXT
EI
RET ;RST 6.5 is not pending, return to main program.
NEXT: MOV A, B ;Get bit patter, RST 6.5 is pending.
ANI 0DH ;Enables RST 6.5 by setting D1 = 0.
ORI 08H ;Enable SIM by setting D3 = 1
SIM
JMP SERV ;Jump to service routine for RST 6.5
197
Serial I/O & Microprocessor
 I/O requirements
• I/O Mapped & Memory Mapped
 Transmission
• Synchronous Vs. Asynchronous
• Simplex & Duplex (Half or Full)
• Parity Check (Odd or Even) with bit D7 = 1: Even
 BAUD
• No. of Signals / Second
 Modem
• FSK (Send bits according to frequency)
198
8155/8156 Programmable I/O & Computer Architecture
& Microprocessor
Timer
Features
 40 Pins
 256 Bytes of R/W Memory
 3 Programmable I/O Ports

• Two 8-bit parallel I/O ports (A and B)
• One 6-bit port (C)
 Programmable 14 bit binary counter / Timer
 Multiplexed Address & Data Buses
199
Pin Configuration Computer Architecture
& Microprocessor
PC3 1 40 Vcc
PC4 2 39 PC1
TIMER IN 3 38 PC2
RESET 4 37 PC0
PC5 5 36
PB7
6 35
TIMER OUT PB6
7 34
IO/M PB5
8 33
CE
PB4
9 32
RD
PB3
10 31
WR
8155 / 8156 PB2
11 30
ALE
12 29 PB1
AD0
14 28 PB0
AD1
14 27 PA7
AD2
15 26 PA6
AD3
16 25 PA5
AD4
17 24
PA4
AD5 23
18
PA3
AD6 19 22
PA2
AD7 20 21 200
PA1
Block Diagram Computer Architecture
& Microprocessor
IO/M
Port A
AD0-7 A 8 PA0-7
256 X 8
Static
CE RAM
Port B
ALE
B 8 PB0-7
RD 8155
WR
Port C
RESET C 6 PC0-5
Timer
Timer CLK Vcc (+5V)

TIMER OUT Vss (0V)
201
Expanded Block Diagram Computer Architecture
& Microprocessor
CE
Port
A7 A
Internal
Latch 5 Timer MSB
A1
Port
4 Timer MSB
B
A2
A3
Internal 3 Port C
Decoder2 Port B
Register
Control
1 Port A Port
0 C
Control Register
AD7
Data Bus Timer
AD0
LSB
Timer
MSB
202
& Microprocessor
 Port Address A15 – A8 is duplicated by A7 – A0
A A A Control
2 1 0
0 0 0 Control Register
0 0 1 Port A
0 1 0 Port B
0 1 1 Port C
1 0 0 Timer LSB
 A15
1 0 1 Timer MSB
& A are Active Low Enable
14
 A , A
13 12 & A11 are give as input to 8205 decoder
 O is give to the chip enable of 8155
4
203
& Microprocessor
204
& Microprocessor
To enable o4 of 8205 A13=1, A12=0,
A11=0
 The
A Following
A A A A table
A HEXgiveControl
the address
of 13
Ports of 28155
12 11 1 0 Code
1 0 0 0 0 0 20 H Control
Register
1 0 0 0 0 1 21 H Port A
1 0 0 0 1 0 22H Port B
1 0 0 0 1 1 23H Port C
1 0 0 1 0 0 24H Timer
LSB
1 0 0 1 0 1 25H Timer 205
Control Register Computer Architecture
& Microprocessor
D7 D6 D5 D4 D3 D2 D1 D0
Port A Port B
0 – Input ; 1 - Output
00 NOP
01 STOP/NOP
D D P P PC P P PC
2 C5 C4 C2 C1 0
IEA IEB
10 STOP after TC 3 3
11 START
0 0 I I I I I I
1 – Enable
0 – Disable
1 1 O O O O O O
ST BF INT
0 1 O O O BA RA
A
ST BF INT ST BF INT206
Interfacing 7 segment LED & Microprocessor
Display
 Design 2 7-segment LED displays using Ports A & B of
8155 to display the data bytes.
Solution
 HP 5082/7340 are inbuilt decoders- is attached to Port A
 9370 decoder & 7-segment LEDs is attached with Port B
 The Data Byte separated into nibbles and displayed
207
& Microprocessor
208
 Control Word & Microprocessor
D7 D6 D5 D4 D3 D2 D1 D0
= 03H
0 0 0 0 0 0 1 1
No Effect Not Port C Port B Port A

on Timer Applicable Is not As
As
Being used O/P O/P
 Program
MVI A, 03H ; Initialize ports A and B as output ports.

OUT 20H
MVI A, BYTE1
OUT 21H ; Display BYTE1 at port A.
MVI A, BYTE2
OUT 22H ; Display BYTE2 at port B.
HLT
209
& Microprocessor
Timer in 8155
 Two 8bit Registers
 14 bits are used for counters
 2 bits for Timer Mode
 Timer can be stopped

• At midst of Terminal Count
• At end of Terminal Count
210
& Microprocessor
Timer
M M T1 T1 T1 T1 T T T T T T T T T T
2 1 3 2 1 0 9 8 7 6 5 4 3 2 1 0
M M Description
2 1
0 0 One Square
Wave
0 1 Continuous
Square Wave
1 0 Single Pulse 211
Example for using Timer
& Microprocessor
The System Clock is connected to Timer IN of 8155. The clock has 3MHz
Frequency. Write a program to produce continuous square wave with a frequency
of 1KHz. Includes a start timer command, disable the port interrupts, make Port
B&C as O/P ports and make Port A as I/P port.
1 0 1 1 1 0 0 0 LSB Timer
0 1 0 0 1 0 1 1 MSB Timer
1 1 0 0 1 1 1 0 Control Word
• Timer
• 300010 = 0BB8H
• Timer M2, M1 = 0,1 (Continuous Square Wave)
• Control Word
• D0, D1, D2 & D3 = 0,1,1&1 respectively (Port A is I/P & Port B&C are O/P
• D6, D7 = 1, 1 (Start the Timer)
212
& Microprocessor
Program
MVI A, B8H - Setting LSB of Timer
OUT 24H - Loading LSB Timer
MVI A, 4BH - Setting MSB Timer
OUT 25H - Loading MSB Timer
MVI A, CEH - Setting Control Word
OUT 20H - Loading Control Word
213
& Microprocessor
8355 / 8755
 2K memory of EPROM
 2 8-bit I/O Ports
 Data Direction Register
214
& Microprocessor
CE1 1 40 Vcc
CE2 2 39 PB7
CLK 3 38 PB6
RESET 4 37 PB5
N.C. 5 36
PB4
READY 6 35
PB3
IO/M 7 34
PB2
IOR 8 33
PB1
RD 9 32
PB0
IOW 10 31
8355 / 8755 PA7
ALE 11 30
12 29 PA6
AD0
14 28 PA5
AD1
14 27 PA4
AD2
15 26 PA3
AD3
16 25 PA2
AD4
17 24
PA1
AD5
18 23
PA0
AD6 22
19
A10
AD7 20 21 215
A9
CLK
Block Diagram Computer Architecture
& Microprocessor
READY
AD0-7 Port A
A 8 PA0-7
A8-10 2K X 8
EPROM
CE2
IO/M
ALE
8355/8755
RD
Port B
IOW B 8 PB0-7
RESET
IOR
Prog/CE1 VCC
VDD VSS
216
& Microprocessor
217
& Microprocessor
Address Bits
A1 A1 A1 A1
A1
5/ 3/ 2/ 1/ A A A
4/ Selected
A A A A D D D
D
A
D D D 2 1 0 Register
D6
7 5 4 3
0 0 0 0 0 X 0 0 Port A
0 0 0 0 0 X 0 1 Port B
0 0 0 0 0 X 1 0 DDR A
0 0 0 0 0 X 1 1 DDR B
218
& Microprocessor
Interfacing 8755 I/O Ports
219
& Microprocessor
Example
 Write initialization instructions to configure port A and
port B as output ports, and display 32H at port A
Program:
MVI A, FFH ; Control word to set up all bits as output
bits
OUT 02H ; Initialize port A as output
OUT 03H ; Initialize port B as output
MVI A, 32H
OUT 00H ; Display 32H at port A
HLT
220
8279 Programmable Keyboard / Computer Architecture
& Microprocessor

Display Interface
Simultaneous Keyboard Display Operation
 8 character keyboard FIFO
 2-key lockout or N-Key Roll over
 Dual 8 or 16 numerical Display
 Single 16 character display
 Right or Left Entry 16 Byte display RAM

221
& Microprocessor
Major Segments
 Keyboard
• Connected to 64 contact key matrix
• Entries are stored in FIFO
• Interrupt sent for every entry
 Display
• Has 16 characters scanned display
• 16 character memory
222
& Microprocessor
RL2 1 40 Vcc
RL3 2 39 RL1
CLK 3 38 RL2
IRQ 4 37 CTRL/STB
RL4 5 36 SHIFT
RL5 6 35 SL3
RL6 7 34
SL2
RL7 8 33
SL1
RESET 9 32
SL0
RD 10 31
8279 OUT B0
WR 11 30
OUT B1
DB0 12 29
14 28 OUT B2
DB1
14 27 OUT B3
DB2
15 26 OUT A0
DB3
16 25 OUT A1
DB4
17 24 OUT A2
DB5
18 23 OUT A3
DB6 22
19
BD
DB7 20 21 223
CS
Logical SymbolVcc Computer Architecture
& Microprocessor
IRQ RL0-7 8
8 Data
Bus Key Data
SHIFT
RD
CNTL/STB
CPU WR
Interface CS
SL0-3 4 Scan
A0
4
OUT A0-3
Display
RESET
Data
4
OUT B0-3
CLK
BD 224
Vss
Pin Names & Microprocessor
DB0 I/ Data Bus (Bi SL0-3 O Scan Lines

-7 O Directional) Return
RL0-3 I
CLK I Clock Input Lines
RE SHIFT I Shift Input
I Reset Input
SET Control
CNTL
CS I Chip Select I Strobe
/STB
RD I Read Input Input
WR I Write Input OUT Display (A)
O
A0-3 Outputs
Buffer
A0 I OUT Display (B)
Address O
B0-3 Outputs
Interrupt 225
Logic Block Diagram
& Microprocessor
226
& Microprocessor
Different Sections
 Keyboard Section
 Scan Section
 Display Section
 MPU Interface Section
227
& Microprocessor
Programming 8279
 left or right entry and key rollover.
 clock frequency prescaler.
 starting address and incrementing mode of the FIFO

RAM.
 RAM address to read and write data and

incrementing mode.
 blanking format.
228
& Microprocessor
229
& Microprocessor
Circuit
 The 8279 Programmable Keyboard / Display Interface
 A Matrix keyboard with 22 keys
 Six seven-segment LEDs: DS1-DS6
 74LS156 decoder with open collector outputs.
 Transistors as current Drivers
 8205 decoder for the decoding logic
230
& Microprocessor
Port Address
Keyboard/Display Mode
MVI A, 00H Control word to set mode: Left 0 0 0 D D K
K K
entry, 8-character, 2-key lockout
encoded scan keyboard
STA 1900H Initialize 8279
231
PUSH H & Microprocessor
PUSH PSW Read FIFO RAM: Control Word

LXI H, 1900H Keyboard control 0 1 0 A1 X A A
A
register address
MVI M, 40H Control word to read
from keyboard
DCR H Data Port Address 1800H
MOV A, M Read data Data Format D7 D6 D5 D4 D3 D2 D1 D0
ANI 3FH Mask D7 and D6. CNTL SHFT ROW COL
CNTL, Shift keys are
not being used
STA IBUFF Store in R/W memory
POP PSW
POP H
RET
232
8254 Programmable Interval & Microprocessor
Timer
 40 Pin
 3 independent Counters
 5 Modes of Operations
233
& Microprocessor
Signals of 8254
234
& Microprocessor
Modes of Operations
 Mode 0
 Interrupt on Terminal Count
• Count Begins one clock pulse after the count
has been written in to counter
• GATE 0 = 1, then counter 0 counts down
• CLK 0 pulse then the counter decrements by 1
• GATE 0 = 0. then counts inhibited
 The operation is same for all the 3
counters
235
& Microprocessor
Read/Write Operations
236
& Microprocessor
Control Word
237
& Microprocessor
Memory, Port & Timer Address
238
& Microprocessor
Control Word for 8255A#1
239
& Microprocessor
Control Word for 8255A#2
240
& Microprocessor
Control Word for 8254
241
& Microprocessor
Program
MVI A, CWR1 ;Get 8255A #1command word
OUT CR1
MVI A, CWR2 ;Get 8255A #2 command word
OUT CR2
MVI A, BLMSET ;Get byte to blank the LIMIT SET
lamp.
OUT PORTC2 ;Send to port C of 8255 #2
CALL RALARM ;Reset alarms.
CALL STCNTR0 ;Start counter 0.
EI ;Enable interrupts
RET ;End of subroutine.
242
& Microprocessor
Temperature Monitoring System

General Controls
 µprocessor based system is designed to control the
temperature of a water bath, by controlling a heater ON or
OFF
 Accuracy of  1º C
 Temperatures can be set by switches
 7 segment Display is used to display the temperature
 This involves both hardware & software design
243
& Microprocessor
Hardware Design
 A transducer is used to convert temperature into an equivalent
analog electrical quantity
 The analog signal is converted in digital by A/D Converters
 A relay is used to switch heater ON & OFF
 Two digit 7-segment display is used to display the temperature
 All these hardware are interface to MPU through I/O ports
 EPROM is used to store the Software
244
Block Diagram of Hardware Computer Architecture
& Microprocessor
Design MPU
Address, Data & Control Busses
SOD
SID
8 Bit
Relay 8 Bit
EPROM 8 bit
I/O Port Driver & I/O Port
I/O Port
Relay
Temp.
A/D 7-segment
Transducer Switches
& Buffer Converter Displays
245
Detailed Block Diagram
& Microprocessor
246
& Microprocessor
247
& Microprocessor
 Memory
• No RAM is necessary
• EPROM 2716 is used to used (2KB of Memory)
 I/O Port
• System requires 26 I/O lines (17 O/P & 9 I/P)
• 8255 (24 Ports) with SID & SOD
 A/D Converter
• ADC chips are quite costlier when compared to
DAC. As fast conversion is not necessary
• ADC can be implemented by using an external
DAC and a comparator with MPU as Controller
248
& Microprocessor
 LED Display
• 2 7-segment display is used
 Switches
• One Thumb wheel Switch is used(4 toggle switches)
 Transducer & Buffer

• A thermistor with 5K is used at 25ºC
 Relay & relay driver

• Temperature of Bath is controlled by immersion heater
ON or OFF
• Immersion heater is ON or OFF by a relay
• This controlled by SID & SOD of MPU
249
& Microprocessor
Software Design (Algorithm)

 Initialize I/O port of 8255.
 ADC is performed by successive approximation
 Getting Temperature for Bath.
 Display measured temperature in LED Display
 Read the desired temperature from Switches
 Comparing measured temp. with desired temp. & making SOD

low or high
 Generate a delay of 2 Second
250
Flowchart
Start & Microprocessor
Initialize I/O ports
A/D Converter
Get Desired Temp.
Display measured Temp
Read Desired Temp.
NO
Is MT = DT
Yes
Make Relay Make Relay
OFF ON
.5 Sec Delay 251

Program Computer Architecture
& Microprocessor
MVI A,
89H Initialize Port A & B as
OUT O/P, C as I/P
03H
AGAI MVI
Initial Data Value
N: C,00H
REP: MOV A,
C
Send to DAC
OUT
00H
MVI D,
08H
DCR D Wait for DAC 252
Program Computer Architecture
& Microprocessor
OUT
Display it
01H
IN 02H Get switch setting
CMP M Compare Temp. in
Mem. & Acc.
JC OFF If Temp. is High or
JZ OFF Equal OFF relay
ON: MVI A,
40H
SIM Else ON relay
JMP
DELAY
OFF: MVI A, 253

Computer Architecture and Microprocessor

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Computer

Systematic representation of data in Numerical Format

 Decimal Number System  0 to 9

 Binary Number System  0 and 1

 Octal Number System  0 to 7

 Hexa Decimal Number System  0 to 9 and A to F

Decimal Number System

 Uses digits from 0 to 9.

 Value of digit corresponds to its position in the number

Binary Number System

 Computer uses the Binary Number System

 Consists of numbers 0 and 1

 Bit (Binary digit)

Octal Number System

 Uses the digits from 0 to 7.

 can be represented by a group of 3 bits

Hexa Decimal Number System

 Uses the digits from 0 to 15.

 Numbers from 10 to 15 represented by alphabets A through F

 Can be represented by a group of 4 bits.

Decimal Binary Octal Number Hexa Decimal

Conversion of decimal Number to Hexadecimal Number

 To convert, divide the decimal number by 16 successively

To convert 540 to decimal

The decimal equivalent of 54010 = 21C16

Conversion from Hexadecimal to Decimal

 Multiply the digits of the number by the powers of 16 and add

Conversion of Hexadecimal to Binary Number

 The binary equivalent of each digit is used

 To convert 5B16 to binary equivalent:

 To convert B316 to binary equivalent:

Conversion of Binary to Decimal Number

 Sum of product of each digit with 2 raised to the power

Conversion from Octal to Decimal

 Multiply the digits of the number by the powers of 8 and add

 Difference of each digit of a number from 9

 To find 9’s complement of 54 :

 Equivalent to the negative of a number

 Obtained by adding 1 to the 9’s complement of a number

 To find 10’s complement of 54

1’s Complement of binary number

 Similar to 9’s complement of decimal number

 Obtained by subtracting each digit from 1

 To find 1’s complement of 101

2’s complement of a binary number

 Equivalent to 10’s complement of a decimal number

 Represents the negative equivalent of that number

 To find the 2’s complement of 1010

 To subtract 1010 from 1100

 Find 2’s complement of 1010

 Add 2’s complement of 1010 with 1100

 Each digit is represented by four bits

 Only one bit changes for each consecutive numbers

Decimal Number Gray Code Decimal Number Gray Code

 American Standard Code for Information Interchange

 Represents upto 128 characters

 First 3 bits-zone bits

 Second 4 bits-numeric bits

 Uses 8 bit code

 Represents upto 256 characters

 First 4 bits-zone bits

 Second 4 bits-numeric bits