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Thus, the NAND gate is a universal gate since it can implement the AND, OR and NOT functions.
To prove that any Boolean function can be implemented using only NOR gates, we will show that the AND, OR, and NOT operations can be performed using only these gates.
Thus, the NOR gate is a universal gate since it can implement the AND, OR and NOT functions.
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The logic levels are generated by switches. If a switch is up, the input is effectively high (1). If the switch is down, it connects a diode cathode to ground, which is low (0). The output depends on the combination of inputs at A and B. The inputs and output are customarily recorded in a truth table at (c) to describe the logic of a gate. At (a) all inputs are high (1). This is recorded in the last line of the truth table at (c). The output, Y, is high (1) due to the V+ on the top of the resistor.
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It is unaffected by open switches. At (b) switch A pulls the cathode of the connected diode low, pulling output Y low (0.7 V). This is recorded in the third line of the truth table. The second line of the truth table describes the output with the switches reversed from (b). Switch B pulls the diode and output low. The first line of the truth table records the Output=0 for both input low (0). The truth table describes a logical AND function.
Diode OR Gate
A two input OR gate composed of a pair of diodes is shown in Figure . If both inputs are logic low at (a) as simulated by both switches downward, the output Y is pulled low by the resistor. This logic zero is recorded in the first line of the truth table at (c). If one of the inputs is high as at (b), or the other input is high, or both inputs high, the diode(s) conduct(s), pulling the output Y high. These results are reordered in the second through fourth lines of the truth table.
Diode OR Gate
A backup battery may be OR-wired with a line operated DC power supply in Figure to power a load, even during a power failure. With AC power present, the line supply powers the load, assuming that it is a higher voltage than the battery. In the event of a power failure, the line supply voltage drops to 0 V; the battery powers the load.
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Transistor as Inverter
In this circuit, the transistor is in a state of saturation by virtue of the applied input voltage (5 volts) through the two-position switch. Because its saturated, the transistor drops very little voltage between collector and emitter, resulting in an output voltage of (practically) 0 volts. If we were using this circuit to represent binary bits, we would say that the input signal is a binary 1 and that the output signal is a binary 0.
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When we move the switch downward then base is connected to ground, that is, we are applying a binary 0 to the input and receive a binary 1 at the output.
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An OR gate is a circuit whose output is HIGH if either input (or both) is HIGH, and LOW only if both inputs are LOW. Connect and disconnect wires from Vin to points A and B to turn the inputs ON (high, or logic 1 or +4V to +6V) or OFF (low, 0, <0.5V). Remember that when the base voltage goes HIGH the transistor turns on and the collector and emitter are connected to each other as in the Emitter Follower circuit above. When the applied input base voltage is removed the transistor turns off.
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In AND Gate, output is high if all the inputs are high. To implement that, we use two transistors model. Here if input A and B both are high then Vcc i.e. +6V will appear in the output.
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In OR gate, output is high if any one of two inputs are high. To implement OR gate, we have used a Two Transistors Model. If any input A or B is high i.e if any Base gets driving voltage it will pass the Vcc (+6V) to the output. So, output will be high.
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Current can flow, and produce a voltage drop across the resistor, produce HIGH output only if either or both of the transistors are turned off. When both transistors are turned on then Vcc will pass to the ground through two transistors, making output LOW.
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CMOS Inverter
When a low voltage (0 V) is applied at the input, the top transistor (P-type) is conducting (switch closed) while the bottom transistor behaves like an open circuit. Therefore, the supply voltage (5 V) appears at the output. Conversely, when a high voltage (5 V) is applied at the input, the bottom transistor (N-type) is conducting (switch closed) while the top transistor behaves like an open circuit. Hence, the output voltage is low (0 V).
The output is the opposite of the input - this gate inverts the input. Notice that always one of the transistors will be an open circuit and no current flows from the supply voltage to ground.
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Logic Family
A "logic family" may also refer to a set of techniques used to implement logic within VLSI (Very Lange Scale Integration) circuits such as central processors, memories, or other complex functions.
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Gunning transceiver logic (GTL) Transistor transistor logic (TTL) P-type metal oxide semiconductor logic (PMOS) N-type metal oxide semiconductor logic (NMOS)
Depletion-load NMOS logic
Complementary metal oxide semiconductor logic (CMOS) Bipolar complementary metal oxide semiconductor logic (BiCMOS) Integrated injection logic (I2L)
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