TOPIC 3

OP AMP OPERATIONAL AMPLIFIER

OPERATIONAL AMPLIFIERS (OP AMP)

Operational amplifier (op amp) is an integrated circuit that amplifies the difference between two input voltages and produces a single output. Have high gain amplifier and able to amplify signal with frequency ranging from 0 to 1MHz. To perform mathematical operations like summation, subtraction, multiplication, differential and integration etc in analogue computer. It has 2 input terminal : a) Inverting input terminal b) Non inverting input terminal

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A complete amplifier electronic circuit may contains transistor, diode, resistor, capacitor and others components and constructed on a single silicon ship. Op-amp application: As scalar or linear (e.g. small signal) constant gain amplifier both inverting and no-inverting As unity follower Adder or summer Subtractor Integrator Differentiator comparator

Symbol of operational amplifier

NON INVERTING INPUT

INVERTING INPUT

Internal Block Diagram Op Amp

Inverting Non inverting Differential Amp. High impedance High Gain Voltage Amplifier Low impedance Output Output

First Stage

Input terminal
Has 2 input:+ non inverting input - inverting input high input impedance

Second Stage

Gain Voltage amplifier

Is the ability of an electronic circuit to increase level of a signal. High voltage gain High drive current gain to trigger output and not burden to input.

Third Stage

Output terminal
has 1 output terminal low output impedance

Differential Amplifier block diagram

Push pull amplifier block diagram

DIFFERENTIAL AMPLIFIER
 Connect 1 voltage signal onto 1 input terminal and another voltage signal onto other input terminal.  The output voltage will be proportional to the "Difference" between the two input voltage signals of V1 and V2.
Vout = R3 (V2-V1) R1

Input Bias Current

 Ideally, no current flows into the input terminals of an op amp.  In practice, there are always two input bias currents, IB+ and IB(see figure beside).  It is an average current flowing both inputs.  Ideally, two input bias currents are equal.

Diagram of input bias current

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 A very variable parameter!  IB can vary from 60 A to many A, depending on the device.  Some structures have well-matched IB , others do not.  Some structures' IB varies little with temperature, but a FET op amp's IB doubles with every 10C rise in temp.  Some structures have IB which may flow in either direction.

Input Offset Current

 Input offset current, IOS= Ib+- Ib-.  Offset current arises from incidental imbalances in the internal component of the amplifiers.  This is the difference of the two input bias currents when the output is zero.  The offset current value is usually smaller than bias current.

INPUT OFFSET VOLTAGE

 The voltage source Voff in series with the input terminals is called an offset voltage, it is caused by internal circuit imbalances.  This is the voltage that must be applied to one of the input pins to give a zero output voltage.  For an ideal op amp, output offset voltage is zero.

Common Mode Gain

Gain when both input terminal have same signal Should be when Vid =0, Vo= 0 Practically, when Vo have value Acm will have small value. Knows as CMRR, Common Mode Rejection Ratio CMRR = Closed loop gain, Av Common mode gain, Acm Normally Acm << 1 CMRR larger is better Unit : dB Av CMRR (dB) = 20 lg Acm For op-amp 741, CMRR = 90dB

Common Mode Rejection Ratio(CMRR). A measure of the ability of the op-amp to reject signals that are simultaneously present at both inputs is called the Common Mode Rejection Ratio or CMRR. It is the ratio of the common-mode input voltage to the generated output voltage. Expressed in decibels (dB)

More stages of gain amplifier

When a number of stages are connected in series, the overall gain is the product of the individual stage gain. Figure below shown a connection of three stage.

More stages of gain amplifier

 The first stage is connected to provide non inverting gain as given by equation below A = 1 + Rf R1

 The overall circuit gain is then noninverting and calculate by A = A1 A2 A3

Where

A1 = 1+Rf , A2 = -Rf and A3 = -Rf R1 R2 R3

PUSH PULL AMPLIFIER

When we get amplifier output current for 1800 of input it's called B class amplifier. In a push pull class B amplifier, one of the 2 power transistors or other amplifying elements handles the positive half of the waveform and the other element handles the negative half of the waveform as shown in figure below.

Figure: Block representation of push pull operation.

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Two amplifiers are used to accomplish class B power amplifier. One is used to push the current and the other one is used to pull the current. These two amplifiers are almost same but one is connector supplied and the other one is emitter supplied. This "push-pull" amplifier is used where high power output and good fidelity are needed: Example: receiver output stages, public address amplifiers, and AM modulators.

Operation circuit..
R1 provides the proper bias for Q1 and Q2. The tapped secondary of T1 develops the two input signals for the bases of Q1 and Q2. Half of the original input signal will be amplified by Q-1, the other half by Q-2. T2 combines (couples) the amplified output signal to the speaker and provides impedance matching

Figure: Push Pull circuit

Definition of IDEAL OP AMP

An idealised op-amp has the following characteristics:
infinite input impedance, infinite open-loop gain, zero output impedance, infinite bandwidth, zero noise

IDEAL OP AMP
Parameters Voltage gain Input impedance Characteristics of Ideal OP Amp

(to increase the output voltage)

(when Rin = ,zero current flows

from V+ to V- ) 0 (i.e., Rout = 0, so that output voltage does not vary with output current). 0 (i.e., when the input terminals are shorted so that , the output is a virtual ground or Vout = 0).

Output impedance Input offset voltage

Bandwidth

(i.e., the frequency magnitude

response is considered to be flat everywhere with zero phase shift)

 An offset voltage means that there exists a voltage vd when both inputs are grounded. This offset is called an input offset because the voltage vd is offset from its ideal value of zero volts. The input offset voltage is multiplied by the open loop gain to create an output offset voltage.