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Thread Dispatching
# of addr
spaces:
One Many
# threads
Per AS:
MS/DOS, early
One Traditional UNIX
Macintosh
Embedded systems Mach, OS/2, Linux,
(Geoworks, VxWorks, Win 95?, Mac OS X,
Many JavaOS,etc)
Win NT to XP, Solaris,
JavaOS, Pilot(PC) HP-UX
• Real operating systems have either
– One or many address spaces
– One or many threads per address space
• Did Windows 95/98/ME have real memory protection?
– No: Users could overwrite process tables/System DLLs
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.4
Goals for Today
A: tmp=1
A(int tmp) { ret=exit
if (tmp<2)
B: ret=A+2
B();
printf(tmp); C: ret=b+1
} A: tmp=2
B() { Stack ret=C+1
Pointer
C();
} Stack Growth
C() {
• Stack holds temporary results
A(2);
• Permits recursive execution
}
• Crucial to modern languages
A(1);
main() {
ComputePI(“pi.txt”);
PrintClassList(“clist.text”);
}
main() {
CreateThread(ComputePI(“pi.txt”));
CreateThread(PrintClassList(“clist.text”));
}
Time
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.9
Memory Footprint of Two-Thread Example
Address Space
Stack 2
each other?
– What maximum size should we choose
for the stacks?
– What happens if threads violate this? Heap
– How might you catch violations?
Global Data
Code
Loop {
RunThread();
ChooseNextThread();
SaveStateOfCPU(curTCB);
LoadStateOfCPU(newTCB);
}
• Blocking on I/O
– The act of requesting I/O implicitly yields the CPU
• Waiting on a “signal” from other thread
– Thread asks to wait and thus yields the CPU
• Thread executes a yield()
– Thread volunteers to give up CPU
computePI() {
while(TRUE) {
ComputeNextDigit();
yield();
}
}
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.18
Stack for Yielding Thread
ComputePI
Stack growth
yield
Trap to OS
kernel_yield
run_new_thread
switch
B(); A A
Stack growth
} B(while) B(while)
proc B() { yield yield
while(TRUE) {
yield(); run_new_thread run_new_thread
} switch switch
}
• Suppose we have 2
threads:
– Threads S and T
CopyFile
Stack growth
read
Trap to OS
kernel_read
run_new_thread
switch
add $r1,$r2,$r3 C
P le or Dispatch to Handler
“Interrupt Handler”
subi $r4,$r1,#4
a b i s …
is r v
D pe
slli $r4,$r4,#2
Su
Transfer Network
Packet from hardware
Pipeline Flush
to Kernel Buffers
lw $r2,0($r4) …
Re er
lw $r3,4($r4)
Us
st M
Restore registers
or o d
add $r2,$r2,$r3
Clear current Int
e
sw 8($r4),$r2
PC
… Disable All Ints
e Restore priority
RTI
• An interrupt is a hardware-invoked context switch
– No separate step to choose what to run next
– Always run the interrupt handler immediately
1/30/06 Joseph CS162 ©UCB Spring 2006 Lec 4.27
Use of Timer Interrupt to Return Control
Stack growth
Some Routine
Interrupt
TimerInterrupt
run_new_thread
switch