Memory

By Anoop Thomas

Memory
Register memory (Inside Processor) Main memory (RAM,ROM) Secondary Memory (Disk)

Main Memory
Random Access Memory Read Only Memory

RAM
Larger than reg m/y Volatile Size 512Mb,2Gb etc Read and written very quickly Access time (time req. to read or write) is constant for all RAM locations DRAM,SRAM,SDRAM,DDR SDRAM RAM can hold programme as well as data Cache memory (faster than main m/y but slower than reg m/y)

Basic RAM Architecture

Word Lines

Bit Cell Bit Lines High Sense Amplifier Low Data

Address

Types of RAM
SRAM DRAM SDRAM DDR SDRAM

Static RAM (SRAM)

Word Line

Read: Drive word line, sense value on bit lines

!Bit

Bit

Write: Drive word line, drive new value (strongly) on bit lines

SRAM Cell

Accessing a Static RAM

CE Addr Data

Read

Write

Note: CE signal is often active-low as opposed to how shown here. SRAMs also generally have a write enable signal

Write Cycle

Write Timings

Notice that Write Cycle = Read Cycle. All volatile RAM types have this feature.

Cycle Time & Access Time

Cycle Time how fast can I start another operation? Access Time how fast is data ready? For SRAMs, Cycle Time = Access Time, this is a feature of SRAMs.

Dynamic RAM (DRAM)

Word Line

Read: Drive word line, sense value on bit line (destroys saved value)

Write: Drive word line, drive new value on bit line.

Bit Line

DRAM Memory Cell

Word line Cs Turn this transistor on to access data

Bit line

Memory value stored on capacitor ( a very small capacitor...)

Data value appears on bit line

Dynamic RAM Timing (Read)

RAS CAS Addr

Again, control signals are often active-low

DRAM Characteristics
Very dense (high capacity). Cheap per bit. Slow for Random Access (access to any location)
Cycle time >> access time, Read Cycle time = Write cycle time.

Has special access modes to speed block transfers

Important since transfers to DRAM in modern computer system is always block-oriented for cache fills.

Only has half the address pins that you would expect
1M x 8 DRAM has only 10 address pins instead of 20 Reduces package size, can pack more DRAM chips per unit area. Address values multiplexed between row/column addresses

Static vs. Dynamic RAM

Static RAM
Fast (active drive) Less dense (4-6 transistors/bit) Stable (holds value as long as power applied)

Dynamic RAM
Slower High density (1 transistor/bit) Unstable (needs refresh)

Neither device holds data if power removed

SDRAM & DDR SDRAM

Synchronised with the clock of the CPU`s system bus(SDRAM) Optimisation of SDRAM that allows data to be transferred on both the rising edge and falling edge of a clock signal.

ROM
Read only m/y Non-volatile Usually stores the BIOS info. PROM,EPROM,EEPROM,FLASH

Disk Memory
Magnetic Memory (Hard disks) Optical Memory (CD, DVD, Blue ray disc)

Flash
SRAM-like interface, density of SRAM Non-volatile (retains contents when power is off) Read Cycle time same as SRAM (10s of nanoseconds) Write Cycle >> Read Cycle write times in microseconds Applications include smart cards (credit cards, medical history cards, etc) Intel is market leader, has a Flash RAM cell that stores 2-bits per cell (can sense 4 different voltage levels from cell).

Memory Hierarchy
Cost/Bit Access Speed

The further away, the cheaper per bit.

The further away, the slower the Cache access time, the higher the Main Memory capacity (density).
Registers Fixed Disk Floppy Zip CD-ROM CD-RW Capacity

Tape